NOTE: Figures are missing.
May 3, 1996
Heavy Ion Results on FPGAs (Version 2)
Heavy ion single event effect (SEE) testing was performed at BNL on April 30-May 2, 1996 on the following devices:
| MFR | Device | Part# | Date Code | Other Markings | Vcc |
|---|---|---|---|---|---|
| ATMEL | FPGA | AT6002-JC | 9512 | 4D065904 | 5V |
| Xilinx | FPGA | 3090APG175-6 | 9512 | - | 5V |
| AT&T | FPGA | ATT2C04-2 | 9544K | 15630405 T144 | 5V |
Additional device information is as follows:
| Device | Package | Process | Epi | Configuration RAM in bits | Usable Gates/Test Design |
|---|---|---|---|---|---|
| AT6002-JC | 84-pin PLCC | 0.8 um CMOS | 10um | 64Kx1/8K used | 2000/1024 stage shift reg. |
| 3090APG | 175-pin CPGA | 0.8 um CMOS | ? | 64160/8026 | 6000/166 of 320 CLBs (51%) |
| ATT2C04 | 144-pin PQFP | 0.5 um CMOS | ? | 6400/1024 used | 4300/32 stage FIFO |
All devices are RAM-based programmable devices with schematic configurations downloaded via an EPROM external to the device.
Test modes used were:
AT6002-JC
Dynamic - While being irradiated, a 100kHz clock is fed through a chain of 1024
stage shift register.
XC3090A
Dynamic - While being irradiated, a 1 MHz clock is fed through two 8-bit counters
on 2 separate busses as well as four 8-bit shift registers. Shift register output is
monitored on a digital scope.
ATT2C04 (aka ORCA)
Dynamic - While being irradiated four structures, each with a 2x4 FIFO
configuration are operated with a 10 MHz clock.
Ions used for testing were:
| Ion | Energy | LET at normal incidence |
| F-19 | 140 MeV | 3.38 MeV*cm2/mg |
| Si-28Cl-35 | 186 MeV | 7.88 MeV*cm2/mg |
| 208 MeV | 11.4 MeV*cm2/mg |
Intermediate LET values were gained by varying the device to the beam angle of incidence.
Types of Errors
Output bits in error are kept count of as DATA errors (i.e., SEU in shift register). If device output no longer appears or a dramatic shift in the output is recognized, a device reconfiguration (i.e., SEU in configuration RAM portion of the device) has occurred. This latter error is dubbed a Single Event Reconfiguration (SER).
Test Results
(Please note the units on graphs are NOT consistent)
Data errors
Data errors were obsesrved on the AT6002 (Figure 1) and the XC3090 (Figure 2) devices. LETth's are as follows:
AT6002 - LET between 7 and 8
XC3090 - LET between 4 and 7
No data errors were seen on the AT&T AT2C04 (limited test).
SER
SERs were observed on the AT6002 (Figure 3), the XC3090 (Figure 4), and the ATT2C04 (Figure 5) devices. LETth's are as follows:
AT6002 - LET between 7 and 8
XC3090 - LET between 4 and 7
ATT2C04 - LET < 7.88
SEL
Latchup was observed on all 3 device types (Figures 6, 7, 8). LETth's are as follows:
AT6002 - LET between 11 and 11.4
XC3090 - LET between 4 and 7
ATT2C04 - LET < 7.88
All SELs on the ATMEL device were recoverable with power resets. Nominal operating Icc was around 60 mA. SEL currents were between 200-232 mA.
The Xilinx device operated nominally at 10 mA. The device recovered with power resets when SEL currents were around 20 mA. However, device failure occurred when Icc exceeded 70 mA.
In the case of the AT&T, Icc went from a nominal 25 mA to 189-300 mA when SEL occurred. Device failure ensued due to a hole being burnt into the substrate.
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