Designer Advantage R1-2000
Version: 4.0.3.5
File Name: H:\Designs\TDSX32CQ256_4Strings\TDSXCQFP256_4Strings.adb
Design Name: tdsxcqfp256_4strings Design State: layout
Family: 54SXA Die: RT54SX32S Package: 256 CQFP
Speed: -1 Voltage (VCCi/VCCa): 5.0/2.5
Restrict JTAG Pins: YES
Restrict Probe Pins: YES
Restrict JTAG Programming Pins: UNSET
Junction Temperature Range: MIL
Voltage Range: MIL
Netlist File Name: H:\Designs\TDSX32CQ256_4Strings\td_4strings_sx32.edn
Fuse File: N/A
Fuse Checksum: UNSET
Pin Checksum: c103555e_fef9ae92
Silicon Signature: UNSET
SEQUENTIAL Used: 4 Total:
1080 (0.37%)
COMB Used: 1573 Total: 1800 (87.39%)
LOGIC Used: 1577 Total: 2880 (54.76%)
(seq+comb)
IO w/ Clocks Used: 74 Total: 223
CLOCK Used: 1 Total: 2
HCLOCK Used: 1 Total: 1
There were 0 error(s) and 17 warning(s) in this design.
***** Layout Variables *********************************************
Mode: STANDARD Incremental: OFF
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Last Revised: January 09, 2002
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