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SX-A SEE Test MEC Die, 0.25 µm

BNL, September, 2000

 

Update: September 12, 2000.

This test of the SX-A, 0.25 µm, MEC die.  This test was run with nominal supply voltages, 5.0/2.5/2.5. It used the the TMRSX32_Pattern logical pattern.

The device was packaged in a PQFP208.

Test frequency was 1 MHz.

Here's some schematics showing how the important part of the DUT is designed.  TMRSX32_Logic.ppt

For both of these K-Latch test parts, there were very few upsets in any of the shift register strings.

282.5 MeV,  Br-81 ions were used for all runs.

SEU Summary Chart: lan3200seu.pdf

SEL was not detected.

Loss of control, i.e., JTAG upset, was not detected.

BNL
Run #

Range
(um)

LET

 Tilt  

Time
(sec)

Flux

Fluence
x 106

 1_Err DOC DOVH DOS DOH 0_ERR Strip Charts
3   36.5   37.4   0  88.7 1.10E5 10.0 345 388 0 369 0 356 lan3201b1.pdf
4 31.6   43.2   30   104.4 9.7E4 10.0 466 480 1 403 0 446 lan3201b2.pdf
5 25.8   52.9   45   127.5 7.9E4 10.0 497 587 1 517 0 593 lan3201b3.pdf
6   18.2   74.8   60   183.3 5.5E4 10.0 691 692 0 635 0 672 lan3201b4.pdf

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