PROGRAMMABLE TECHNOLOGIES WEB SITE

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.


TEST, BNL, September 2000

 

Update: September 15, 2000.

Test silicon for K-Latch.  Derived from the 0.25 um SX-A.  Most runs were with nominal supply voltages, 5.0/2.5/2.5 - some used a reduced voltage.  All runs are nominal voltage unless marked. The DUT used the the TMRSX32_Pattern logical pattern.  Here's some schematics showing how the important part of the DUT is designed.  TMRSX32_Logic.ppt

Since the package was a CQFP256, the device was mounted in a standard Yamaichi socket and was "upside down." We cut a hole in the board and socket. It worked well, we were able to get to 60 degrees tilt (in the long direction of the die) without shadowing.

Previous testing of this device by another RK showed poor SEU performance and the difference in results will be worked out in the next few weeks.  The difference appears to be improper programming of the part, with JTAG upsets causing faults.  Our test set is pretty good at detecting and identifying this class of fault.

Since the K-Latch uses redundant structures, the angle of rotation can be critical to making an accurate measurement. This includes not only the magnitude of the angle and the range of the ion, but also the direction of the rotation. The redundant K-Latch circuits are implemented with the redundancy in the "long" direction of the die, as showed in the figure below.  We tested rotating in two directions.  The main angle, which is normally used at BNL, is rotation, and is around a vertical axis as shown below.  The second axis used was roll.  Roll is about an axis that is perpendicular to the part - that is, in the direction of the beam.

 

   ++++++++++++++++++++++++++++++++++++++
   +                                    +
   +               DIE                  +
   +                                    +
   +                                    +
   ++++++++++++++++++++++++++++++++++++++
   ^                 ^
   |                 |
   PIN 1             |
                     |
                     |
                     |
                     |

               axis of rotation

The beam is going directly into the screen.

SEEDutCard.gif (1614112 bytes)


All tests for these runs were at a fixed 1 MHz frequency.

The range of ions and angles are considered limitations of this test.

For both of these K-Latch test parts, there were very few upsets in any of the shift register strings.

Ions used:

282.5 MeV Br-81 (LET = 37.4 MeV-cm2/mg)

345.0 MeV I-127 (LET = 59.9 MeV-cm2/mg)

Apparently the TRST* pin was not enabled for the JTAG interface as a result of improper programming.  A "penalty run" will be needed to verity that the TRST* pin is implemented correctly.  This is currently being planned.

Bromine Runs

BNL
Run #

Range
(um)

LET

Tilt   Roll

Time
(sec)

Flux

Fluence
x 106

1_Err DOC DOVH DOS DOH 0_ERR Data File   Notes
7 36.5 37.4 0 0 89 9.0x104 8.0 0 0 0 0 0 0 LAN3411B1 Runaway at 70%
8 31.6 43.2 30 0 144 7.0x104 10.0  0 0 0 0 0 0 LAN3411B2  
9 25.8 52.9 45 0 170 5.9x104 10.0  0 0 0 0 0 0 LAN3411B3  
10 18.2 74.8 60 0 264 3.8x104 10.0  0 0 0 0 0 0 LAN3411B4 Runaway at 99%
11 31.6 43.2 30 -89 177 5.6x104 10.0  0 0 0 1 0 0 LAN3411B5 Runaway at 95%
12 25.8 52.9 45 -89 39 4.2x104 1.6 0 0 0 0 0 0 LAN3411B6 Runaway at ~20
Needed to power cycle
13 25.8 52.9 45 -89 23 4.0x104 0.91 0 0 0 0 0 0 LAN3411B7 Runaway at ~8%
14 18.2 74.8 60 -89 428 2.3x104 10.0  0 0 0 0 0 0 LAN3411B8  
15 25.8 52.9 45 -89 82 2.7x104 2.2 0 0 0 0 0 0 LAN3411B9 Runaway at ~20%
16 31.6 43.2 30 -60 69 6.0x104 4.1 0 0 0 0 0 0 LAN3411B10 Changed to other board
Used for clean PQFP208 SX-A runs
Still runaway!
17 31.6 43.2 30 -60 50 5.0x104 2.5             LAN3411B11 Operator error
18 18.2 74.8 60 -60 69 1.3x105 8.8             LAN3411B12 Runaway
19 18.2 74.8 60 -30 121 8.0x104 9.7             LAN3411B13 Small runaway at end, < 300, Burst error?
20 31.6 43.2 30 -30 37 1.5x105 5.7 0 0 0 0 0 0 LAN3411B14 Runaway at 50%
21 36.5 37.4 0 0 79 8.9x104 7.0 0 0 0 0 0 0 LAN3412B1 Runaway at 60%
22 31.6 43.2 30 0 34 2.1x105 7.3             LAN3412B2 Runaway
23 25.8 52.9 45 0 29 2.0x105 5.6             LAN3412B3 Runaway
24 36.5 37.4 0 0 36 2.8x105 10.0  0 0 0 0 0 0 LAN3412B4 Beam on left half
25 36.5 37.4 0 0 15 2.9x105 4.4             LAN3412B5 Runaway
Beam on right half
26 36.5 37.4 0 0 6 2.8x105 1.6             LAN3412B6 Runaway
Beam on right quarter
27 36.5 37.4 0 0 36 2.8x105 10.0  0 0 0 0 0 0 LAN3412B7 Beam on right eight
Maybe no beam at all.
28 36.5 37.4 0 0 8 2.5x105 2.0             LAN3412B8 Runaway
Beam on right quarter

 

Iodine Runs

Note: Only "left hand" portion of die [see orientation above] was irradiated to prevent JTAG upset, as the TAP controller is on the right hand side of the die.

BNL
Run #

Range
(um)

LET

Tilt   Roll

Time
(sec)

Flux

Fluence
x 106

1_Err DOC DOVH DOS DOH 0_ERR Data File   Notes
39 32.8 59.9 0 0 257 3.8x104 9.9 0 0 1 0 0 0 LAN3412I1 Beam on left part of die
Upset at shutter movement
40 32.8 59.9 0 0 273 3.7x104 10.0 0 1 3 2 0 0 LAN3412I2 Beam on left part of die
V = 4.5, 2.25V
41 28.4 69.1 30 0 425 2.4x104 10.0 0 0 3 1 0 0 LAN3412I3 Beam on left part of die
V = 4.5, 2.25V

Home
Last Revised: January 09, 2002
Digital Engineering Institute
Web Grunt: Richard Katz