NASA Office of Logic Design

NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.


Intellectual Property for FPGAs

Intellectual property (IP) is becoming increasingly more important as FPGA devices get bigger and the designs get more complex.  Here's a brief listing of some IP that is available.  Note, this is intended as a forum so feel free to contribute designs of VHDL code, or links to other IP sites.

Actel PCI Target NASA/GSFC has a site license for this function.  It is written in VHDL and is targeted to the Act 3 architecture with some of the code structural VHDL..
Actel UART NASA/GSFC has a site license for this function.  (This is now direct from Inicore).
Chip Express PCI, general. Chip Express reports that Virtual Chips/Phoenix has a PCI core a Chip Express ASIC that's been successfully used.  They have a sublicensing agreement with Mentor's Inventra Cores group for several PCI cores.  With the Inventra cores, Chip Express licenses the cores directly.  With Phoenix, the technical information is communicated between the customer and Phoenix.
NASA "K-BUS" This chip set has been designed to implement a 32-bit backplane interface for low-power, high-reliability, spacecraft applications.  These devices provide a simple programming interface and an easy to use, multifunction hardware interface with no need to modify the devices.  This chipset is complete and are not 'cores.'   Functions include burst transfers, discrete inputs and outputs, DMA operations (with integrated decoding or a full 32-bit address bus), sleep mode, pulse outputs, interrupts, etc.  The current implementation of this chip set is in the Act 3 family.   However, since the design only utilizes C-Modules for storage (for good SEU performance), it may be ported to other families.

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Last Revised: April 07, 2003
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