Two DynaChip DL5256 SRAM configured FPGAs were subject to a heavy ion SEL test at Brookhaven National Laboratory, November, 1998. These devices are produced on an IBM BiCMOS process and were packaged in a PG 208 in a cavity down configuration. The lot date code for both devices is 9749. No lookup tables (LUTs) are present in this architecture. Each module in the device consumes ~ 50-60 mW when used in a configuration and is controlled by the confiugration program loaded from an external memory.
Each device was subject to irradiation with Bromine at normal incidence, LET = 37 MeV-cm2/mg and the supplies were set to nominal voltages. Prior to each irradiation, the configuration was loaded from an external serial PROM. S/N 001 was irradiated twice and S/N 002 was irradiated once. Immediately after the beginning of each test, the device currents rapidly increased, tripping the limits on our power supply, set at 800 mA, corresponding to delta currents of over 300 mA per supply.
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Last Revised: January 09, 2002
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