Designer Advantage R1-2000
Version: 4.0.4.4
File Name: H:\Designs\TD1020_Full\TD1020_FULL.adb
Design Name: TD1020_FULL Design State: layout
Device Data
Family: ACT1 Die: RH1020 Package: 84 CQFP
Speed: STD.0KR Voltage: 5.0
Restrict Probe Pins: YES
Junction Temperature Range: MIL
Voltage Range: MIL
CAE Variables
Netlist File Name: H:\Designs\TD1020_Full\td1020_full.edn
Post-Combiner device utilization:
LOGIC Used: 541 Total: 547 (98.90%)
Pin Report - Date: Tue Oct 02 08:30:50 2001 Pinchecksum: 9929f88e_becfc35e
Design Name: TD1020_FULL Family: ACT1 Die: RH1020 Package: 84 CQFP
Name Number
B1_IN 2
B1_OUT 44
B2_IN 9
B2_OUT 34
B3_IN 18
B3_OUT 33
CLOCK 53
DA 17
ENCNTR 74
IN1A 46
IN2A 47
INX1 36
INX2 51
IN_AND3 27
IN_AND4 41
IN_NAND4 30
IN_NOR4 12
IN_OR3 54
IN_OR4 58
OUTA 43
OUTX1 66
OUTX2 45
O_AND3 28
O_AND4 52
O_NAND4 31
O_NOR4 13
O_OR3 42
O_OR4 59
QA0 21
QA1 19
QA2 24
YO0 68
YO1 69
YO2 67
YO3 70
YO4 78
YO5 76
YO6 75
YO7 73
YO8 82
YO9 83
YO10 79
YO11 81
~CNTRLD 80
~RESET 23
~RESETCNTR 72
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Last Revised: January 09, 2002
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