EEE Links -- Vol. 1, No. 4 -- October 1995
by Rich Katz
Electronic Systems Branch
Goddard Space Flight Center
301-286-9705
richard.katz@gsfc.nasa.gov
This column will be provided each quarter as a source for relaying important information on programmable logic devices and related applications. The main subjects will be reliability, radiation results, NASA capabilities, etc. This quarter the focus is on Actel Field Programmable Gate Arrays, specifically relating to issues for space flight use. A clarification will be made on the use of the special I/O pins and for next month the Loral radiation-hardened Actel parts will be discussed. If you have information that you would like to submit or an area you would like discussed or researched, please give me a call.
Actel Special I/O Pins According to the Actel databook, unused I/O pins are supposed to be configured by the software as outputs at a low logic state (driven low). However, several special I/O pins (SDI and DCLK) do not always follow this rule. JPL investigated a problem in one of their systems and the result was the following information supplied by Actel's Ken Hayes, Director of Product Engineering.
For the A1020 series of parts, the SDI and DCLK pins are left as high impedance. As a result, if these two pins are unused in a design (and the software tries to keep them unused), then they will be floating and possibly oscillate from a variety of causes. I have verified that the SDI and DCLK pins do float on a sample A1020B, designed with the 2.21 version software. I have also verified for this device that the PRA and PRB pins, when unused, are tied to a logic 0. Note that the RH1020 is based on the A1020B mask set.
For ACT 2 A12XX devices all unused pins are automatically programmed as outputs which are driven low, and therefore may be left unterminated on the board.
For all other Actel devices: A14XX, A12XX XL, and 32XXX DX, the unused pins are tristated but the pad circuitry is unpowered, which should mean that they may be left unterminated. Note that the new RH1280 radiation-hardened device is based on the A1280XL mask set. For the SDI and DCLK pins I would recommend, for designs that do not use these pins, tie these two pins to ground through a resistor of > 10 kohm.
For the MODE pin a hard jumper to ground should be placed in parallel with the resistor. Using this scheme, if a problem arises, the PROBE feature of the device would be directly usable by clipping on the Actionprobe (which provides direct access to all internal signals). As an additional reminder, PCB designs should be checked to ensure that the MODE pin is grounded. Two designs recently have been found to have had these pins floating.
For information about ACTEL FPGAs see the article entitled "Diagnosis of Mulitple Faults Using IDDQ Techniques" in this issue of EEE Links. This paper is a publication from the IEEE ITC. As a short introduction to the paper mentioned above, the IDDQ techniques are important for failure diagnosis and fault counting; additionally, they give insight into the proper screening of these parts prior to insertion on flight boards, as it has been shown that damaged, functional parts may still pass data book parametric limits.
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Last Revised: January 09, 2002
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