NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.

Design Seminar

on

Actel SX-A and RTSX-S Programmed Antifuses

Rich Katz
NASA Office of Logic Design

Tuesday, April 13, 2004
10 am to 12 noon
Bldg. 11, AETD Conference Room

Abstract

Eleven Field Programmable Gate Arrays (FPGAs) in the SX-A and RTSX-S series, built in the 0.25 µm MEC/Tonami process, have had confirmed programmed antifuse failures to date during user testing. No failures have been reported with 0.22 µm UMC SX-A or eX series devices.   This seminar will cover the fundamentals of antifuse-based FPGAs followed by a review of the work performed by the NASA-DOD Independent Assessment Team and the working group led by The Aerospace Corp.  Additionally, recommended design techniques for mitigation risk will be discussed, and test plans from the on-going working group will be summarized along with goals and objectives.

Presentation

1. Introduction
2. Background Material
3. Parts Handling
4. Drive Strength
5. Case Study: Simultaneous Switching Outputs
6. Electrical Overstress Model and Programming Algorithms
7. PCB Layout Issues
8. Probing
9. IBIS Models and Simulation
10. Experiments

References

1. "OLD News #14: Testing and Application of Modern Microelectronic Devices: Do's, Don'ts, and Failures," November 19, 2003.
2. "The First Summary Report on the Independent Review of RTSX-S FPGA Reliability on NASA Space Flight Missions," February 11, 2004.
3. "OLD News #15 Actel SX-A and RTSX-S Programmed Antifuses," March 17, 2004
4. "NASA Advisory: Actel RTSX-S and SX-A Programmed Antifuses," March 26, 2004.

Additional references are embedded in the references above.  The OLD News letters have their references available as hyperlinked documents.

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