Abstract
Digital signal processing has traditionally been done using Von-Neuman or Harvard type processors with enhancements such as single cycle multiplies. Recent advances in speed, density, and features have made Field Programmable Gate Arrays (FPGAs) very attractive for digital signal processing applications, particularly when performance requirements are beyond the capability of microprocessors. Unfortunately, the majority of signal processing work over the last quarter century has been implemented as software on computers. Consequently, there is currently very little overlap between hardware design and DSP expertise. Algorithms developed for software platforms are usually very inefficient for direct hardware implementation, and without the overlapping areas of expertise, the resulting FPGA realization is bound to disappoint.
This seminar helps to bridge the gap between DSP and FPGA design, aiding the designer in achieving the performance potential of FPGAs. This seminar will first review computer arithmetic and then look in detail at efficient FPGA implementations of common DSP elements such as multipliers, filters, and mixers. Tradeoffs between clock rate and performance will be discussed along with several design examples.
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Last Revised: April 02, 2003
Digital Engineering Institute
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