Abstract (preliminary)
This seminar will give systems engineers and reviewers an overview of key issues in the technical reviewing of designs and analyses for space flight digital electronics, with an emphasis on Field Programmable Gate Array (FPGA) technology. These reviews are done for one purpose only: to help ensure that the design of the hardware is flight worthy.
The topics covered in this seminar will focus on items that are often seen to be problems in space flight digital hardware and provide material and a methodology for the systems reviewer to use, allowing the team to obtain the most benefit for the time and effort expended. The subject material will be at a higher level than seminars targeted towards the designer/analyst and will not show how to design a particular circuit, perform an analysis, or prepare the results. This seminar will describe what needs to be done, provide some examples, and the rationale for focusing on a particular issue.
An introduction to the Design Guidelines and Criteria for Space Flight Digital Electronics will be given and key elements discussed. This document was prepared both for the design engineer analyst and the systems engineer/reviewer.
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NASA Office of Logic Design
Last Revised: October 10, 2003
Digital Engineering
Institute
Web Grunt: Richard
Katz
