NASA Office of Logic Design

NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.


NASA Test of Actel SX-A, SX-S and SX-SU FPGAs

Undershoot

For this test, undershoot is defined as the maximum excursion of a signal below ground.  The specification for this parameter for RT54SX-S and RT54SX-SU devices is an absolute maximum level of -0.5V.  With respect to this specification, Actel's language is similar to that of other manufacturers:

Stresses beyond those listed in Table 2-4 may cause permanent damage to the device. Exposure to absolute maximum rated conditions may affect device reliability. Devices should not be operated outside the recommendations in Table 2- 5.

It is important to note this specification and design accordingly.  We have seen many circuits with excessive undershoot and subsequent ringing which has led to logic problems.  Of course, such out of specification behavior of the signals is a stress factor for the microcircuit.

For the NASA reliability testing that is on-going, we are operating and stressing the device outside of the manufacturer's recommendations.  This is done solely to provide an acceleration environment for the devices under test and to demonstrate margin or the lack of margin.  The results from these reliability tests do not imply that flying devices under such conditions is acceptable and there is no attempt made to engage in "spec expansion."  Extrapolation of this data for the purposes of "spec expansion" should not be done.  Similarly, the number of simultaneous switching outputs far exceeds the recommendations of the manufacturer and is outside good engineering practice.

The following I/O conditions for the first stress level of the reliability test has been set.  The amount of stress may be increased at a future time.

Figure 1. Sample undershoot vs. VCCI.  An average, room temperature
undershoot of -1V was set for the first stress level of the NASA reliability test.


Home - NASA Office of Logic Design
Last Revised: March 05, 2005
Web Grunt: Richard Katz
NACA Seal