KU2 Anomalies: S/N 50952
S/N 50952 – “Set” Pin Stuck High
S/N 50952 was programmed successfully and passed initial, room temperature ATE testing. However, S/N 50952 failed subsequent cold temperature (-55 ºC) and room temperature ATE runs. The device was removed from the population prior to the beginning of stress testing and was submitted for failure analysis.
- Passed programming
- Passed initial room temperature ATE run
- Failed subsequent cold (-55 ºC) ATE run
- Failed subsequent room temperature ATE run
- Silicon Explorer revealed Pin 53 (Set_n) is stuck high
Detailed Analysis Summary
- Curve trace of pin 53 – Showed expected I/V curve
- I/O Circuit schematic examination revealed transistor N3b as likely suspect
- FIB (Focused Ion Beam) pads added at multiple “Set_n” signal path nodes
- Micro probing confirmed:
- “Set_n” output stuck near high
- De-processing to bare silicon revealed ESD in NMOS Transistor N3b
Figure 1. Set_n schematic with FIB pad locations
Figure 2. ESD damage in user input circuitry.
Figure 3: I/Os close to GNDQ considered higher risk for ESD damage.
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Last Revised: February 03, 2010
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