NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.

Independent NASA Test of
Actel SX-A, SX-S, and SX-SU
Field Programmable Gate Arrays (FPGAs)

This page is used for the official dissemination of test status , results, and reports.

Test Data from Lot KU1, Step3B

One  Anomaly: S/N 50985 failed V_IH, SET_N pin (CMOS)

	Composite tP Data	Delta tPLH	Delta tPHL
Step 0	Step 0 Distribution
Delta Step 0 to 1	Step 1 Distribution
Delta Step 1 to 2	Step 2 Distribution
Delta Step 0 to 2
Delta Step 2 to 3A	Step 3A Distribution
Delta Step 0 to 3A
Delta Step 3A to 3B	Step 3B Distribution
Delta Step 0 to 3B

S/N 50985: Failed V_IH (CMOS)

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Last Revised: February 22, 2005
Digital Engineering Institute
Web Grunt: Richard Katz