NASA Office of Logic Design

NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.


Independent NASA Test of
Actel SX-A, SX-S, and SX-SU
Field Programmable Gate Arrays (FPGAs)

KM1 Anomalies: S/N 37858

S/N 37858 -- Failed functional array testing.

Summary

After being successfully programmed, S/N 37858 successfully passed tri-temperature (-55 °C, 25 °C, 125 °C) ATE testing.

It then successfully proceeded through step KM1-1A, 50 hours of HTOL testing.  The conditions were T = 125 °C, VCCA = 2.75V, and VCCI = 4.0V, and passed room temperature ATE testing.

The device then proceeded through step KM1-1B, identical environmental and electrical conditions to step KM1-1A.  The duration of step KM1-1B was 200 hours.  Subsequent ATE testing indicated a failure for functional array testing.  The device passed all other tests, including the propagation delay test.

The failure is attributed to a damaged K antifuse.

Further Analysis

Figure 1.  Failure captured between ShiftZ0Z_5 and ShiftZ0Z_6 output signals in the array_pat_inst.  ShiftZ0Z_6 signal has a rising edge that occurs one clock cycle early while ShiftZ0Z_6 signal’s falling edge occurs at the correct time.

 

Figure 2.  Correct operation of reference unit.  The picture above shows the ShiftZ0Z_5 and ShiftZ0Z_6 output signals in the array_pat_inst on a reference unit S/N 37955

 

Figure 3.  Location of failure in the logic diagram of the Array Pattern Generator.

 

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Last Revised: November 16, 2005
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