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Total Ionizing Dose Effects in A SRAM-Based FPGA
D.M. MacQueen, D.M. Gingrich, N.J. Buchanan and P.W. Green
Centre for Subatomic Research, Department of Physics
University of Alberta, Edmonton, Alberta
Canada T6G 2N5
We have measured the effects of total ionizing dose on Xilinx XC4036X FPGAs. The FPGAs were irradiated at a dose rate of about 0.5 krad/hr. An average total dose of 39 krad(Si) and 16 krad(Si) were absorbed by the XL-series and XLA-series FPGAs, respectively, before the power supply current increased.
Table of Contents
- Radiation Effects on SRAM and FPGA Devices
- Devices Under Test
- Configuration Circuit
II. Experiment Setup and Dosimetry
III. Test Procedure
V. Summary and Discussion
List of Figures
Figure 1. Dose rate during the initial exposure of each device under test.
Figure 2. Power supply current versus accumulated dose for XC4036XL device A (circles), B (squares), C (triangles), and D (inverted triangles).
Figure 3. Power supply current versus accumulated dose for XC4036XLA device A (circles), B (squares), and C (triangles).
Figure 4. Total number of logic errors versus time after the first error occurred for XC4036XL device A (circles), B (squares), C (triangles), and D (inverted triangles).
Figure 5. Total number of logic errors versus time after the first error occurred for XC4036XLA device A (circles), B (squares), and C (triangles).
Figure 6. Power supply current versus time during annealing for XC4036XL device A (circles), B (squares), C (triangles), and D (inverted triangles).
Figure 7. Power supply current versus time during annealing for XC4036XLA device A (circles), B (squares), and C (triangles).
Figure 8. Power supply current versus time during the entire test for XC4036XL device A (circles), FPGA B (squares), FPGA C (triangles), and FPGA D (inverted triangles).
Figure 9. Power supply current versus time during the entire test for XC4036XLA device A (circles), FPGA B (squares), and FPGA C (triangles).
List of Tables
Table 1. Results from the first irradiation of the devices under test. The first column is the dose at which the current began to rise and the second column is the dose at which the first errors occurred.
Table 2. Date code of the devices under test.
The FPGAs were irradiated with an average dose rate of (470 ± 15) rad(Si)/hr. For the XL devices, the current increased after an absorbed dose of about 39 krad(Si), while for the XLA devices this increase was probably due to the onset of leakage currents.
The first errors occurred after an absorbed dose of about 60 krad(Si) for the XL devices and 42 krad(Si) for the XLA devices (excluding XLA device C). Most of the errors were soft errors, in that they could be cleared with a circuit reset without having to reload the circuit configuration.
For six of the seven DUT we believe that leakage currents increased until a logic failure occurred. All attempts to download the configuration circuit for the six DUT were successful and hence there was no indication of a failure with the SRAM configuration switches. However, this was not the case during the second irradiation of the XLA device A or during either irradiation period of the XLA device C. After irradiation, we tried to configure the device at room temperature, either the radiation source removed, but were unsuccessful. This was probably due to a failure of the configuration switches in these two devices.
A second period of radiation after annealing showed a similar operating behavior to the first irradiation period. The current increased during irradiation and dropped slowly during the annealing. During the second irradiation period, the XLA devices withstood nearly ten times more radiation than the XL devices.
Although the XL devices withstood about twice the dose of the XLA devices and their current increased only by about 0.3 A under irradiation, annealing could only lowered their current by about 0.2 A. For the XLA devices, however, the current was lowered by almost the entire amount 1.2 A over the annealing period.
The XL devices were fabricated at UMC and the XLA devices at Seiko. Table 2 shows the date code on the FPGAs we tested. The error rate and annealing behavior of XL devices C and D were somewhat different from that of the other two XL devices tested. The date code for XL devices C and D were different, and hence may explain the different behavior from that of the other two XL devices. Nevertheless, the behavior of XL devices C and D during the first irradiation period was remarkably similar to that of the other XL devices.
The 0.25µm/0.35µm hybrid process at Seiko utilizes the 0.25µm design rules for the five layer interconnects, but build the transistors at a channel length of 0.35µm to support the 3.3 V operating voltage. The lack of additional detailed knowledge about the process differences between the XL and XLA devices do not allow us to make predictions about the effects of the technology on resistance to radiation, like has been done in other work. Hence our presentation had been rather empirical.
If dose rate effects are negligible for CMOS devices below dose rates of 0.5 krad/hr, we would not expect Xilinx FPGAs in the XL- or XLA-series to survive total dose damage after ten years at the LHC.
Last Revised February 03, 2010
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