A scientific study of the problems
of digital engineering for space flight systems,
with a view to their practical solution.
Presented at the 1997 IEEE Nuclear and Space Radiation Effects Conference
R. Katz1, K. LaBel1, J.J. Wang2, B. Cronquist2, R. Koga3, S. Penzin3, and G. Swift4
1NASA Goddard Space Flight Center, Greenbelt, MD 20771
2Actel Corporation, Sunnyvale, CA 94086
3The Aerospace Corporation, LA, California 90009
4Jet Propulsion Laboratory, California Institute of Technology, Pasadena, CA
91109
Abstract
Manufacturers of field programmable gate arrays (FPGAs) take different technological and architectural approaches that directly affect radiation performance. Similar technological and architectural features are used in related technologies such as programmable substrates and quick-turn application specific integrated circuits (ASICs). After analyzing current technologies and architectures and their radiation-effects implications, this paper includes extensive test data quantifying various devices' total dose and single event susceptibilities, including performance degradation effects and temporary or permanent re-configuration faults. Test results will concentrate on recent technologies being used in space flight electronic systems and those being developed for use in the near term.
This paper will provide the first extensive study of various configuration memories used in programmable devices. Radiation performance limits and their impacts will be discussed for each design. In addition, the interplay between device scaling, process, bias voltage, design, and architecture will be explored. Lastly, areas of ongoing research will be discussed.
Table of Contents
I. Introduction
II. Device Categories
III. Radiation PerformanceA. Configuration Technologies
1) Oxide Nitride Oxide (ONO) Antifuses
2) Amorphous Silicon Metal-to-Metal (M2M) Antifuses
3) Antifuse Radiation Effects
4) SRAM-Based Devices
5) Quick-Turn ASICSB. Fabrication Considerations
1) Latchup Susceptibility and Analysis
2) Total Dose Capability and Analysis
3) Proton Susceptibility and Analysis
4) Logic UpsetC. Architectural Features
IV. Flight vs. Ground Data
V. Conclusion
VI. References
VII. Acknowledgements
VIII. Appendix I
List of Figures
Figure 1. Actel ONO Antifuse
Figure 2. Actel a-Silicon Antifuse 'Pancake'
Figure 3. Quicklogic a-Silicon Antifuse
Figure 4. Antifuse Breakdown Voltage vs. LET (MeV-cm2/mg)
Figure 5. Antifuse Breakdown E-Field Strength vs. LET (MeV-cm2/ mg)
Figure 6. ICC as Function of Iodine Ion Fluence for Devices with Antifuses of Varying Thickness.
Figure 7. RH1280 Antifuse Rupture 'Signature'
Figure 8. Single Event Reprogramming for SRAM FPGA
Figure 9. Latchup Performance of Bulk QYH580
Figure 10. Latchup Performance of Epi A3200DX Family
Figure 11. TID Performance as a Function of Foundry
Figure 12. TID Performance of A1280XL Series
Figure 13. A32140DX (Chartered) TID Performance
Figure 14. ICC vs. Dose for Two 0.6 µm Development Parts.
Figure 15. SEU Perf vs. F-F Design for Hardwired F-F's
Figure 16. SEU Perf. vs. F-F Design for Routed F-F's
Figure 17. SEU Performance vs. VCC For the QYH580
Figure 18. XC4000 Series I/O Block
Figure 19. Block Diagram of MPTB Experiment
Figure 20. Side A of the MPTB Experiment.
Figure 21. Side B of the MPTB Experiment.
List of Tables
Table 1. SRAM Configuration Memory Sizes
Table 2. Summary of FPGA Latchup Performance
Table 3. Recent TID Measurements
Conclusion
FPGAs will become increasing critical in spacecraft electronics designs as the emphasis to decrease cost and mission development time continues. These same factors are also driving the use of other technologies such as programmable substrates and quick-turn ASICs. There is a strong drive to utilize standard COTS/military devices in spaceflight systems to minimize cost and development time as compared with radiation-hardened devices. This has serious impacts on the radiation and system performance for spaceflight systems.
While it is desirable to find trends such as those based on process scaling, no generalizations can be made. Instead, it is seen that there is a complex interplay of scaling vs. process vs. system voltage vs. architecture vs. circuit design. Many rules of thumb fail and detailed examination, analysis, and testing is required. New, modern architectural features that permit flexibility for commercial systems can have severe radiation implications. This can require additional system resources such as monitors, protection of circuits' outputs, and system restart/checkpoint capability along with risk of damage to the hardware or system from the new failure modes introduced. Many COTS structures are extremely reliable for ground operations. However, many types of failures from radiation have been detected in structures such as configuration memories, ONO antifuses, and metal-to-metal antifuses from several manufacturers. The susceptibility of the relatively thick, low electric field strength amorphous silicon antifuse was not expected and demonstrates the susceptibility of COTS structures in the radiation environment. Additionally, improvements in antifuse reliability were made; the ONO antifuse in the RH1020 and RH1280 is improved and one metal-to-metal antifuse has so far demonstrated immunity to damage from heavy ions. It has been identified that the screening/stress procedures for antifuse test are critical for eliminating the weak sisters and ensuring adequate reliability. 'Qualification by similarity' must be approached with caution as the introduction of a single architectural feature has been seen to inject a major radiation hazard. Examples have been seen where identical devices produced at different foundries have widely different radiation characteristics. Lastly, the architectures, structures, circuits, designs, scaling, and processes are constantly changing; test methods and equipment must be updated as well to accurately measure the radiation affects on these devices.
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