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A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.

A (16,8) Error Correcting Code (T=2) For Critical Memory Applications

M.S. Hodgart and H.A.B. Tiggeler
Surrey Space Centre,
University of Surrey,
Guildford, Surrey, GU2 5XH, UK.
Tel: +(44) 01483 259278 Fax:+(44) 01483 259503
Email: S.Hodgart@ee.surrey.ac.uk , H.Tiggeler@ee.surrey.ac.uk
http://www.ee.surrey.ac.uk/EE/CSER/UOSAT/

Abstract

High density SRAMs generate errors in their stored data because of natural radiation. This is a particular problem for computing on-board a satellite, where the single-error correction of the usual Hamming code can be inadequate. The two-bit error correcting code described here is a more powerful and efficient alternative.

Table of Contents

1. Introduction

2. The new code

2.1 Encoding
2.2 Decoding

3. Physical implementation

4. Summary

5. Conclusion

List of Figures

Figure 1. Encoder Schematic
Figure 2. Decoder Schematic
Figure 3. SNAP Nano-Satellite On-Board Computer.

Conclusion

The paper has identified an application-specific low-complexity codec: the design (i) allows a natural (power of 2) block size of data; (ii) has DEC and EED capability; (ii) achieves a low complexity by implementing a nonstandard method of decoding. The complexity of the completed code is sufficiently low that a single low-cost 8000 gates Actel A54SX08 FPGA is all that is needed for its implementation.

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Last Revised: January 09, 2002
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