PROGRAMMABLE TECHNOLOGIES WEB SITE

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.

Current Radiation Issues for Programmable Elements and Devices

Presented at the 1998 IEEE Nuclear and Space Radiation Effects Conference


R. Katz1, J.J. Wang2, R. Koga3, K. A. LaBel1, J. McCollum2, R. Brown4,
R. A. Reed1, B. Cronquist2, S. Crain3, T. Scott4, W. Paolini2, and B. Sin2

1NASA Goddard Space Flight Center, Greenbelt, MD 20771
2Actel Corporation, Sunnyvale, CA 94086
3The Aerospace Corporation, LA, California 90009
4Lockheed-Martin Federal Systems, Manassas, VA.

Abstract

State of the art programmable devices are utilizing advanced processing technologies, non-standard circuit structures, and unique electrical elements in commercial-off-the-shelf (COTS)-based, high-performance devices. This paper will discuss that the above factors, coupled with the systems application environment, have a strong interplay that affect the radiation hardness of programmable devices and have resultant system impacts in (1) reliability of the unprogrammed, biased antifuse for heavy ions (rupture), (2) logic upset manifesting itself as clock upset, and (3) configuration upset. General radiation characteristics of advanced technologies are examined and manufacturers' modifications to their COTS-based and their impact on future programmable devices will be analyzed.

Table of Contents

I. Introduction

II. Rupture

A. Oxide Nitride Oxide (ONO) Antifuses
B. Metal-to-Metal (M2M) Antifuses

III. Logic Upset

A. Introduction
B. Logic Upset Examples and Instrumentation
C. RH1020 Logic Upset Analysis and Mitigation

IV. Configuration Upset

A. Introduction
B. Analysis of a Configuration Upset

V. Radiation Test Results and Analysis

A. Heavy Ion and Proton Induced SEU

1) Heavy Ion Effects and Analysis
2) Proton Effects and Analysis
3) SRAM Configuration Memory Analysis
4) Mitigation Technology

B. Single Event Latchup
C. Total Dose

VI. Hardening Efforts

A. RH1020 and RH1280 Devices
B. CGaAs CLAy-10
C. SOI AT6010
D. XQR4000XL
E. RTSX and RHSX

VII. Conclusion

VIII. References

IX. Appendix I. Summary of Devices and Technologies

List of Figures

Figure 1. Summary of antifuse rupture data. Positive margin at LET = 37 MeV-cm2/mg is shown for production RH1020 with a hardened ONO antifuse. One "recipe" of an M2M antifuse did not fail at LET = 82 MeV-cm2/mg, VBIAS = 400 mV.

Figure 2. Clock upset in the RH1020 with each SEU timetagged. The concurrent jumps on DOS and DOH, two independent circuits, indicate clocks upset, as the clock is the common element.

Figure 3. Quantitative analysis of clock upset raw data It is performed by plotting the sample-to-sample differences in the errors counters.

Figure 4. RH1020 (pre-production devices) input buffer transients resulting in "clock upsets." The upset occurs on the transition and is shown here as frequency dependence.

Figure 5. Clock upset performance of pre-production and production RH1020 devices. The production devices had a modified input circuit for improved SEE performance.

Figure 6. Strip chart during irradiation of a prototype FPGA produced on a radiation-hardened, 2 um epi line. The current on some runs exceeded 800 mA and was caused by a configuration error from an SEU in the 1149.1 TAP controller.

Figure 7. The IEEE JTAG 1149.1 scan architecture. The logic core is surrounded by the scan cells, which can perform normal I/O functions or be controlled from the test access port (TAP).

Figure 8. An SEU in the TAP controller. Undefined data is loaded into the output of the Instruction Register causing an apparent loss of functionality.

Figure 9. Transient functional failures of a prototype FPGA incorporating 1149.1 circuitry. The duration of the failure is a function of the TCK frequency.

Figure 10. Comparison of SEU performance for devices fabricated at commercial (MEC) and radiation-hardened (LMFS) foundries.

Figure 11. SEU Response of hard-wired flip-flops at 1.0 µm, 0.6 µm, and 0.35 µm feature sizes. The 1.0 µm device has a nominal 5 V bias; the others have a 3.3 V nominal bias.

Figure 12. Number of configuration bits vs. gate count for four families of FPGAs. Architectures show different "efficiencies" per configuration bit.

Figure 13. TID performance for new and prototype DUTs. COTS produced devices with a 3.3 volt core exhibited radiation-tolerant performance; a modified COTS device passed at > 100 krads (Si).

List of Tables

Table 1. Proton Sensitivities at 195 MeV.
Table 2. Latchup Summary.

Conclusion

Programmable devices will continue to be of increasing importance to spacecraft electronics designers as system requirements increase the trend towards higher performance electronics with increased processing bandwidth and shorter development times. These devices will be required for onboard processing of the increasing data volumes from sensors that cannot be accommodated by typical data storage and compression schemes with the available down link telemetry rates. State-of-the-art, commercial programmable devices have recently progressed rapidly down the technology curve, with operating frequencies rivaling that of high-powered discrete designs and ASICs, in many cases.

Programmable devices can be either custom-designed for space applications or rely on commercial technology and its associated infrastructure. While most programmable devices for space flight are derivatives of commercial designs, the LMFS PROM was designed with radiation issues in mind utilizing a low (0.1 V) bias across unprogrammed ONO antifuses to ensure high-reliability.

Commercially-derived devices' radiation tolerance range from poor to radiation-tolerant, in most cases. Some of the radiation hazards stem from structures and technologies that are perfectly reliable in the commercial/military sector, such as antifuses, TTL-compatible input buffers, flip-flop designs, and circuits such as the JTAG TAP controller, as examples. Total dose performance of 5.0 VDC devices is highly variable, subject to process variations at the commercial foundries.

We have shown that devices' radiation performance levels can be increased to radiation-hard levels without the use of an expensive radiation-hard process. This is through a combination of modification of circuit designs and commercial processes. Examples include a radiationhardened antifuse and total dose performance greater than 100 krads (Si). A number of manufacturers are now actively modifying their designs and their foundries' processes to increase the radiation performance of commercially produced devices.

Within the next few years, the commercially produced, modified devices will likely provide solid radiation performance for the majority of applications, including highspeed processing. Similarly designed devices, produced on traditional radiation-hardened lines, will be available for high levels of radiation performance.


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