Briefing: Independent NASA Test of RTSX-SU FPGAs
On Wednesday May 11, 2005, a briefing on the Actel RTSX-S and RTSX-SU devices will be given at the NASA Goddard Space Flight Center in Greenbelt, MD. The briefing starts at 9:30 am in the Building 8 auditorium.
This briefing will continue the on-going discussions and cover the latest in test results and analyses.
All attendees should complete the registration form below. Non-US citizens wishing to have access to NASA must complete their registration form no later than April 15, 2005. US citizens wishing to have access to NASA must complete the registration process no later than May 5, 2005. Webex access will be available, please select the appropriate registration type. Recording of this meeting will not be permitted. Meeting notes will be distributed.
- 9:30 am Meeting starts
- 12:30 pm Lunch. Buildings 1 and 21 have cafeterias
- 1:45 pm Meeting resumes
- Work until we're done
Snacks for breaks will be provided, courtesy of the NASA Office of Logic Design. Each participant is responsible for their own lunch and dinner (federal rules). This time I was able to order coffee and tea.
- 10: Introduction
- 11: Comparison of A54SX-A/UMC and RTSX-SU Differences
- 12: Timing Analysis for MEC Tiger Team Results
- 20: Summary of NASA Experiment Results
- KU3 and KU4 Plans
- 21: KU1, KU2, KM1, KM2 Anomalies and Failure Analysis Update
- 22: Single S-Antifuse and Programming Update (Updated!)
- 30: ESD Update: Process Improvements and ESD Mechanisms
- 31: ESD: A Tale of Two Lids (New addition!)
- 40: Summary of The Aerospace Corporation Results
- 50: FIT Rate Calculations of RTSX-SU/UMC FPGAs
- 60: Summary of JAXA Experiment Results
- 70: RTAX-S Qualification
- 80: Discussion: Post Programming Electrical Testing and Burn-In
- Risk vs. Rewards (no slides)
- 90: Open Discussion (no slides)
- Dan Elftmann, Actel Corporation, Director of Product Engineering
- John Campbell, The Aerospace Corporation
- Richard Katz, NASA Office of Logic Design
- Noriko Yamada, JAXA
Independent NASA Test of Actel SX-A, SX-S, and SX-SU Field Programmable Gate Arrays (FPGAs)
Last Revised: February 03, 2010
Digital Engineering Institute
Web Grunt: Richard Katz