Briefing: Independent NASA Test of RTSX-SU FPGAs
On Wednesday February 16, 2005, a briefing on the Actel RTSX-S and RTSX-SU devices was given at the NASA Goddard Space Flight Center in Greenbelt, MD. The briefing started at 9:30 am in the Building 8 auditorium and concluded at approximately 8:15 pm.
Regards,
-- rk
Briefing Summary: Independent NASA Test of RTSX-SU FPGAs
Presentations
- 10: Introduction, Rich Katz, NASA Office of Logic Design
- 20: Summary of Industry Tiger Team Results, Larry Harzstark, The Aerospace Corporation
- 21: RT54SX-S & RTSX-SU Programming Status, Dan Elftmann, Actel Corporation
- 30: Equipment and Facilities, Rich Katz, NASA Office of Logic Design
- 31: NASA Test Vehicle, Rich Katz, NASA Office of Logic Design
- 32: Testing and Conditions, Rich Katz, NASA Office of Logic Design
- 40: RTSX-SU Data, Dan Elftmann, Actel Corporation
- 41: Life Test Results, Rich Katz, NASA Office of Logic Design
- 42: NASA Testing Anomaly Update, Dan Elftmann, Actel Corporation
- 43: Actel 54SX series MEC Testing, UMC Reliability Assessment, Dennis Dowden, Northrop Grumman Space Technology
- 44: Acceleration Factor Spreadsheet, Dennis Dowden, Northrop Grumman Space Technology
- 45: Aerospace Corporation Long-Term Experiments, Larry Harzstark, The Aerospace Corporation
- 50: RTSXS-U Rev.B Qualification, Dan Elftmann, Actel Corporation
- 51: ESA’s View & Strategy Regarding Actel RTSX-S Antifuse Reliability Problem, Agustin Fernandez-Leon, European Space Agency
- 60: RT54SX-S & RTSX-SU ESD Performance, Dan Elftmann, Actel Corporation
- 70: Wire Bonding Experiment, Rich Katz, NASA Office of Logic Design
- 71: Gold-Aluminum Intermetallics in Flight Actel RT54SX72S Programmable Gate Arrays, Bruce M. Romenesko, John Hopkins University, Applied Physics Laboratory
- 72: Status of JPL Usage of Actel RTSX-SU/S FPGAs, Douglas Sheldon, Jet Propulsion Laboratory
- 80: SEE Evaluation, Rich Katz, NASA Office of Logic Design
- 81: TID Evaluation, Rich Katz, NASA Office of Logic Design
- 90: Future Test Plans: NASA, Rich Katz, NASA Office of Logic Design
- 91: Future Test Plans: Aerospace Corporation Space Qualification, Larry Harzstark, The Aerospace Corporation
- 92: Evaluation of ACTEL FPGA Products by JAXA, Norio Nemoto, Japan Aerospace Exploration Agency (JAXA)
- 93: Wire Bonding and Recently Examined Actel FPGA Devices, Henning W. Leidecker, NASA Goddard Space Flight Center
- 94: Reliability of Actel Devices Used in Three Programs at GSFC, Henning W. Leidecker, NASA Goddard Space Flight Center
Schedule
- 9:30 am Meeting starts
- 12:30 pm Lunch. Buildings 1 and 21 have cafeterias
- 1:45 pm Meeting resumes
- Work until we're done
Snacks for breaks will be provided, courtesy of the NASA Office of Logic Design. Each participant is responsible for their own lunch and dinner (federal rules).
Agenda
- Summary of Industry Tiger Team Results
- Review of NASA Test Vehicle
- Test Apparatus and Protocols
- Test Results and Status
- ESA related experiences and strategies
- Aerospace Corp. Long-Term Experiments
- Acceleration Factors
- Statistical Analyses of Test Data
- Discussion of Anomalies
- Discussion of Device Structures
- Programming Software and Algorithms
- ESD Test Results
- Wire Bond Test Results
- Future Test Plans
- Aerospace Corp. Space Qualification
- NASA Testing
- Modified New Programming Algorithm
- Open Discussion
Presenters
- Dennis Dowden, Northrop Grumman Space Technology
- Daniel K. Elftmann, Actel Corporation
- Agustin Fernandez-Leon, European Space Agency
- Lawrence I. Harzstark, The Aerospace Corporation
- Rich Katz, NASA Office of Logic Design
- Henning W. Leidecker, NASA Goddard Space Flight Center
- Norio Nemoto, Japan Aerospace Exploration Agency (JAXA)
- Bruce M. Romenesko, John Hopkins University, Applied Physics Laboratory
- Douglas Sheldon, Jet Propulsion Laboratory
Previous Briefings
Independent NASA Test of Actel SX-A, SX-S, and SX-SU Field Programmable Gate Arrays (FPGAs)
Logistics
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Last Revised:
March 08, 2005
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