September, 1999
NOTE: Testing error. These devices have a VCC max of 3.6VDC. They were tested at VCC=5.5VDC in error (although that did show good latchup margin). rk
Heavy ion tests were run on the Texas Instruments SN65LVDS31D LVDS driver. The DUTs for this test were in SOIC packages and mounted on a controlled impedance (100 ohm) printed circuit board.
No latchups were observed during these test runs, but all three devices exhibited a permanent current increase at the higher LET provided by the Au ions (75.8 MeV-cm2/mg). The devices remained functional, but the current draw increased from around 32-33 mA to around 52-53 mA. This increased current draw was not cleared by power cycling and appears to be permanent.
No SEU's were detected either at nominal or lowered voltages. The circuit was configured with the four driver reciever pairs wired in series, with the output of the last reciever monitored in two ways. The first simply goes to a relatively slow RS-422 driver, a DS26C31, which sends the signal down a long cable (50 to 100 feet twisted pair), into a DS26C32 RS-422 reciever, and then into a counter implemented in an Altera 5192. The clock input of a 74AC109 was used as a fast transient pulst detector. No SET's were observed by either method in any of the tests of this device.
Test Results Data
Run Name: BNL0999
Part #: SN65LVDS31D
Package: SOIC
Test Facility: BNL
Run #
Device
Ion
Energy
Range
LET(Si) MeV-cm2/mg
Tilt
Fluence (#/cm2)
Pattern
Voltage
Strip Charts 60
TI1
Br
229.1
21.5
54.2
45
3.833E+07
zeros
5.5 61
TI1
Br
229.1
21.5
54.2
45
4.009E+07
ones
5.5 62
TI2
Br
229.1
21.5
54.2
45
4.014E+07
zeros
5.5 63
TI2
Br
229.1
21.5
54.2
45
4.012E+07
ones
5.5 64
TI2
Br
229.1
21.5
54.2
45
3.642E+07
zeros
4.0 84
TI1
Au
247.9
22.9
75.8
0
4.019E+07
zeros
5.5 TI1G1.pdf 85
TI2
Au
247.9
22.9
75.8
0
4.083E+07
zeros
5.5 86
TI3
Au
247.9
22.9
75.8
0
4.026E+07
zeros
5.5 TI3G1.pdf
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