Final Program.pdf 00_welcome.pdf
Advanced Avionics Systems for Future
Space ExplorationDr. Leon Alkalai
Jet Propulsion Laboratory
leon@cism.jpl.nasa.gov
01_alkalai.pdf
01_alkalai-foils.pdfAbstract:
Keynote Presentation
MEMS Memory ElementsL. Richard Carley,
Carnegie Mellon Univ.
carley@ece.cmu.eduAbstract:
This paper presents a design example that illustrates the potential of microelectromechanical systems (MEMS) to perform the mechanical positioning required for addressing stored data and to enable an entirely new mechanism for reading writing magnetic data. Specifically, MEMS sensors and actuators can be used to achieve active servo control of the separation between magnetic probe tips and a media surface with sb-nanometer accuracy. This allows mechanical position to be used to selectively write magnetic marks in a continuous thin-film magnetic media. In addition, MEMS sensors can be used to measure the separation between a magnetic probe tip and the media with a noise floor of roughly 22 picometers, allowing them to be used as position sensors, in a magnetic force microscope (MFM) style data detection system.
Integrating EEPROM, Resistor, Capacitor, PIN Diode, Schottky Diode and Bipolar Modules into a 0.35 micron CMOS process optimised for Low Voltage Applications.John Ellis
Zarlink SemiconductorAbstract:
We have integrated EEPROMs, resistors, capacitors, PIN diodes, Schottky diodes, an isolated NPN bipolar transistor and dualpoly gate CMOS transistors into a 0.35 micron technology. This provides low threshold voltage transistors for 1-3V battery operation, high voltage transistors for EEPROM programming and a number of passive components for mixed-signal functions. Applications for this technology include Zarlink's medical products where programmability enables complex circuits to be optimised for individual customer requirements.
Nonvolatile Rad-Hard Holographic
MemoryTien-Hsin Chao
Jet Propulsion Laboratory
04_chao.pdf
04_chao-foils.pdfAbstract:
We are investigation a nonvolatile radiation-hardened (rad-hard) holographic memory technology. Recently, a compact holographic data storage (CHDS) breadboard utilizing an innovative Electro-optic scanner has been built and demonstrated for high-speed holographic data storage and retrieval. The successful integration of this holographic memory breadboard has paved the way for follow-on radiation resistance test of the photorefractive (PR) crystal, Fe:LiNbO3. We have also started the investigation of using 2-photo PR crystals that are doubly doped with atoms of iron group (Ti, Cr, Mn, Cu) and of rare-earth group (Nd, Tb) for nonvolatile holographic recordings.
A New Concept for Non-Volatile Memory: The Electric-Pulse Induced Resistive Change Effect in Colossal Magnetoresistive Thin FilmsS.Q. Liu, N. J. Wu and A. Ignatiev
Space Vacuum Epitaxy Center University of Houston
Ignatiev@UH.eduAbstract:
A novel electric pulse-induced resistive change (EPIR) effect has been found in thin film colossal magnetoresistive (CMR) materials, and has shown promise for the development of resistive, nonvolatile memory. The EPIR effect is induced by the application of low voltage (<4V) and short duration (< 20ns) electrical pulses across a thin film sample of a CMR material at room temperature and under no applied magnetic field. The pulse can directly either increase or decrease the resistance of the thin film sample depending on pulse polarity. The sample resistance change has been shown to be over two orders of magnitude, and is nonvolatile after pulsing. The sample resistance can also be change through multiple levels – as many as 50 have been shown. Such a device can provide a way for the development of a new kind of nonvolatile multiple-valued memory with high density, fast write/read speed, low power consumption, and potential high radiation-hardness.
High-Density Ferroelectric Memories Using a One-Transistor CellDavid A. Kamp, Alan D. DeVilbiss and Gary F. Derbenwick
Celis Semiconductor Corporation
dave@celis-semi.comFred Gnadinger and Greg Huebner
COVA Technologies Incorporated
fred@covatech.comAbstract:
Discovery of new classes of ferroelectric materials that have low dielectric permittivity allows nonvolatile ferroelectric random access memories that use a single ferroelectric transistor for the memory storage device to become practical, providing non-destructive read out and density comparable to a Flash memory cell. Ferroelectric memories using this new memory cell have programming times orders of magnitude faster than Flash memory and are capable of providing very dense non-volatile memory for space applications…
Requirements and Usage of NVM in Advanced Onboard Data Processing SystemsR. Some, Jet Propulsion Laboratory
Abstract: See Presentation
Europa Orbiter Mass Memory Requirements & StatusDan Karmon
Abstract: See Presentation
Space Radiation Effects in Advanced Flash MemoriesA. H. Johnston
Jet Propulsion LaboratoryAbstract:
Memory storage requirements in space systems have steadily increased, much like storage requirements in terrestrial systems. Large arrays of dynamic memories (DRAMs) have been used in solid-state recorders, relying on a combination of shielding and error-detection-and correction (EDAC) to overcome the extreme sensitivity of DRAMs to space radiation. For example, a 2-Gbit memory (with 4-Mb DRAMs) used on the Clementine mission functioned perfectly during its moon mapping mission, in spite of an average of 71 memory bit flips per day from heavy ions.
Reliability and Radiation Characterization of an SOI EPROM/Flash Memory CellHank Peterson, Chuck Tabbert, Frank Wright, Hal Anthony, Ron Reedy, Jim Cable
Peregrine Semiconductor CorpAbstract:
This paper describes the on-going work sponsored through the Defense Threat Reduction Agency (DTRA) SBIR program at Peregrine Semiconductor Corp to characterize radiation and endurance behavior of the Peregrine’s patented PlusCell a new nonvolatile memory which utilizes CMOS process on a silicon insulation technology.
Evaluation of Data Retention Characteristics for Ferroelectric Random Access Memories (FRAMs)Ashok K. Sharma NASA Ashok.k.Sharma.1@gsfc.nasa.gov
Alexander Teverovsky QSS Group, Inc. Alexander.A.Teverovsky.1@gsfc.nasa.gov
Abstract:
Data retention and fatigue characteristics of 64 Kb PZT-based FRAM microcircuits manufactured by Ramtron were examined over temperature range from -85°C to +310 °C for ceramic packaged parts and from -85°C to +175 °C for plastic parts, during retention periods up to several thousand hours. Intrinsic failures, which were caused by a thermal degradation of the ferroelectric cells, occurred in ceramic parts after tens or hundreds hours of aging at temperatures above 200 °C. The activation energy of the retention test failures was 1.05 eV and the extrapolated mean-time-to-failure (MTTF) at room temperature was estimated to be more than 280 years. Multiple write-read cycling (up to 3x107) during the fatigue testing of plastic and ceramic parts did not result in any parametric or functional failures. However, operational currents linearly decreased with the logarithm of number of cycles thus indicating fatigue process in PZT films. Plastic parts, that had more recent date code as compared to ceramic parts, appeared to be using die with improved process technology and showed significantly smaller changes in operational currents and data access times.
Radiation Response of Emerging FeRAM TechnologyD. N. Nguyen and L. Z. Scheick Jet Propulsion Laboratory
Abstract:
The test results of measurements performed on two different sizes of ferroelectric RAM FeRAM) suggest the degradation is due to the low radiation tolerance of sense amplifiers and reference voltage generators which are based on commercial CMOS technology. This paper presents TID testing of 64Kb Ramtron FM1608 and 256Kb Ramtron FM1808.
Characterization of Scaled SONOS VSM Devices for Space and Military ApplicationsStephen J. Wrazien
Lehigh University Bethlehem
stw2@lehigh.eduAbstract:
We present results on scaled Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) non-volatile semiconductor memory (NVSM) devices designed specifically for high-density, EEPROMs operating in space and military environments. We describe scaling considerations and process optimization to achieve low-voltage operation (+7V write for 2.5 ms/-7V erase for 7.5 ms) with 10-year retention at 80C. We have conducted studies on ‘oxynitride’ films at temperatures ranging from 22-250C. An extrapolated 10-year memory window of 1.2V is obtained at 22C reducing to an acceptable 0.8V at 80C. SONOS device trap density profiles are compared for both ‘oxynitride’ and ‘silicon-rich’ nitride films.
Overview of Non-Volatile Testing and Screening MethodsFarokh Irom
Jet Propulsion LaboratoryAbstract:
Testing methods for memories, and non-volatile memories are have become increasingly sophisticated as they become denser and more complex. High frequency and faster rewrite times as well as smaller feature sizes have led to many testing challenges. This paper outlines several testing issues posed by novel memories and approaches to testing for radiation and reliability effects. We discuss methods for measurements of Total Ionizing Dose (TID).
An FPGA-Based Test-bed for Reliability and Endurance Characterization of Non-Volatile MemoryVikram Rao, Jagdish Patel*, Janak Patel, and Jeffrey Namkung*
Coordinated Science Laboratory
*Jet Propulsion LaboratoryAbstract:
Memory technologies are divided into two categories. The first category nonvolatile memories, are traditionally used in read-only or read mostly applications because of limited write endurance and slow write speed. These memories are derivatives of ROM technology, which includes EPROM, EEPROM, Flash, and more recent ferroelectric non-volatile memory technology. Nonvolatile memories are able to retain data in the absence of power. The second category, volatile memories, are RAMdevices including SRAM and DRAM. Writing to these memories is fast and write endurance is unlimited, so they are most often used to store data that change frequently, but they cannot store data in the absence of power. Nonvolatile memory technologies with better future potential are FRAM, Chalcogenide, GMRAM, Tunneling MRAM and SONOS EEPROM.
Copper/low-k interconnect integration into 0.15 µm single poly EEPROM technologyV. Shekhar
Altera CorporationAbstract:
Successful and reliable integration of Copper and low-k interconnect into single poly nonvolatile EEPROM technology is demonstrated for the first time. EEPROM cell reliability and performance of Copper interconnect EEPROM cell is compared with Aluminium interconnect EEPROM cell. Additionally, viability of replacing silicon nitride with oxynitride as a diffusion barrier layer underneath metal1 to prevent contamination related to charge loss from getting into EEPROM cell is discussed.
Process Optimization for MOCVD of SrBi2Ta2O9 for Non-Volatile Memory ApplicationsR. Barz AIXTRON AG Aachen, Germany
Abstract: See Presentation
Atomic Scale Structure of Giant Magnetoresistive Multilayers: Energetic Adatom and Surfactant EffectsX. W. Zhou, W. Zou, R. A. Johnson
University of Virginia Charlottesville
Xz8n@virginia.eduAbstract:
The deposition of higher quality giant magnetoresistive (GMR) metal multilayers is essential for improving the performance of magnetic field sensors and nonvolatile random access memories. Improved performance requires reduction of both the atomic scale interfacial roughness and interlayer mixing in the as deposited films. The first step is to develop relationships between controllable process parameters and the atomic scale interfacial composition/structure. We have used atomistic simulation and controlled experiments to begin to address this issue. We show that control of the adatom energy and the use of a silver surfactant can improve the interface structure of multilayers. Increasing the adatom energy causes surface flattening due to enhanced surface reconstruction, but results in interlayer mixing due to impact induced atomic exchanges. A modulated energy deposition scheme was found to reduce both roughness and mixing. The addition of a small quantity of silver was found to reduce the activation barriers for surface atomic assembly and to enable the assembly process kinetics to be shifted to a regime where conventional deposition processes are able to create high quality interfaces.
Non-Volatile Memory Technology for Space and Missile System Application: Past, Present, and FutureL Cohn Defense, Threat Reduction Agency
Abstract: See Presentation
Drivers, Accelerators, and Inhibitors for Solid State Drive MarketsRadu Andrei Web-Feet Research
Abstract: See Presentation
Non Volatile Memory Systems Design: Concept to Reality and Trades along the WayScott R. Anderson
SEAKR Engineering, Inc.
Scott@seakr.comAbstract:
SEAKR Engineering is engaged in designing and building memory systems using non-volatile memory electronics. Primary targeted applications are highly reliable spacecraft data recorders, aircraft reconnaissance recorders, and board level products. This paper identifies the steps that SEAKR takes in determining a preferred system level solution and its implementation. Some key obstacles encountered in past programs are identified along with their solutions.
Experiences in Qualifying a Commercial MNOS EEPROM for SpaceE. E. King, R. C. Lacoe, G. Eng, and M. S. Leung The Aerospace Corporation
everett.e.king@aero.orgAbstract:
Qualifying a commercial Non-Volatile Memory (NVM) component for space poses several challenges: detailed information about the process and design is not likely to be available; long-term reliability data are uncertain or insufficient; little, if any, radiation data exist; and the data retention requirement for a space application generally exceeds ten years. In this paper, we describe our experiences in qualifying a commercial 1-Mbit EEPROM (the Hitachi HN58C1001) for space. Since the unique attribute of a NVM is its ability to retain stored data over long periods of time with no power applied to the component, our work focused on determining the data retention lifetime and developing a procedure to screen potential early failures from the part population.
Neo-Stacking of Packaged Flash MemoryKeith D. Gann
IRVINE SENSORS CORPORATION kgann@irvine-sensors.comAbstract:
A variation on Irvine Sensors’ Neo-Stacking process allows extremely dense packaging of Flash or other memory while sidestepping the problems associated with obtaining Known Good Die (KGD). Memory is often difficult or impossible to obtain in die or wafer form, and comprehensive testing and burn-in is prohibitively expensive for many applications. Readily available plastic encapsulated packaged memory chips are pre-tested and can easily be further tested and screened, speed sorted, tested over a different temperature range, etc. However, they cannot be packaged densely enough to meet the requirements for many applications. This paper describes a method for reprocessing and stacking standard packaged memory, along with support circuitry, into a chip-scale footprint with a very low profile.
Design Hardness Techniques for Radiation Hardened Non-Volatile MemoryJ Benedetto UTMC
Abstract: See Presentation
Future Development of Dense Ferroelectric Memories for Space ApplicationsStephen C. Philpy and Gary F. Derbenwick
Celis Semiconductor Corporation
steve@celis-semi.comAbstract:
The availability of high density, radiation tolerant nonvolatile memories is critical for space applications. Ferroelectric memories, when fabricated with radiation hardened CMOS, can be manufactured and packaged to provide high density replacements for Flash memory, which is not radiation tolerant. Previous work showed ferroelectric memory cells to be resistant to SEU[1] and proton irradiation[2], and ferroelectric storage capacitors to be resistant to neutron exposure.[3] In addition to radiation hardness, the fast programming times, virtually unlimited endurance, and low voltage, low power operation make ferroelectric memories ideal for space missions. Previously, a commercial, double level metal 64-kilobit ferroelectric memory was presented.[4] Although the capabilities of radiation hardened wafer fabrication facilities lag behind those of the most modern commercial wafer fabrication facilities, several paths to achieving radiation tolerant, dense ferroelectric memories are emerging. Both short and long term solutions are presented in this paper. Although worldwide major semiconductor companies are introducing commercial ferroelectric memories, funding limitations must be overcome to proceed with the development of high density, radiation tolerant ferroelectric memories.
Commercialization of 1T-Cell Ferroelectric Memories for Space ApplicationsFred P. Gnadinger and Gregory G. Huebner
COVA Technologies Inc.
fred@covatech.comAbstract:
A new class of ferroelectric materials is under development with parameters ideally suited for 1T cell technology enabling low voltage operation with improved retention. This paper describes the approach taken to integrate the ferroelectric 1T cell module into a CMOS process with special emphasis on radiation hardness for space applications.
Magnetic Random Access Memory (MRAM) and its prospectsK. Lenssen
Phillips Research Lab AA Eindhoven, The NetherlandsAbstract:
Recently the R&D activities concerning Magnetic Random Access Memory (MRAM) have shown an acceleration. Commercial MRAM products are planned to enter the market as early as 2004. In this paper first an overview will be given of the recent developments and the present status of MRAM. Potential issues (like thermal stability, magnetic shielding) will be discussed and some ideas for improvements will be proposed. In order to obtain indications for the most attractive MRAM application areas, the total (multi-billion-dollar) memory market can be divided in three segments: embedded memory, companion memory, and removable memory, differing in the percentage of the chip area that is occupied by memory. In each of these segments MRAM will have to compete with difference types of conventional memory (that form the present solutions) and therefore will also have to meet different specification. It is likely that two variants of MRAM will be developed: a high-performance version (with fast read and write) and a low-cost MRAM (with high-density) to target the different market needs.
Vertical Magnetoresistive Random Access Memory: Promises and ChallengesJimmy Zhu Department of Electrical and Computer Engineering Carnegie Mellon University
Abstract:
Today, the most common archival memory in a computer system is the disk drive, in which data is stored in magnetic disks. When a computer is turned on, data is first loaded from the disk drive into the memory system, i.e. SRAMs and DRAMs, all of which require standby power to maintain their memory states. Since retrieving data from a disk drive is a relatively slow process (the data access time of a disk drive is at least 100,000 times slower than that of computer memory), the “booting” period of a computer or the opening of an application can be long and frustrating.
Criteria for Magnetic Tunnel JunctionsI. Schuller University of California – San Diego
Abstract: See Presentation
A Modified MRAM Architecture without a Current Rectifier Per CellFrank Wang
University of North London
f.wang@unl.ac.ukAbstract:
This paper modifies the magnetic RAM (MRAM) architecture by removing a current rectifier per cell without sacrificing performance. A read operation of stored data is maintained by introducing a simple concept of "virtual ground" of operational amplifier. The modified MRAM design offers a reduced element area with a little penalty of an addition of one switch per column, which occupies a very small silicon area. As a result, a tenfold improvement in storage density has been achieved by an experimental device.
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