Session Chair: Hans Tiggeler - University of Surrey
Invited Speaker: Sandi Habinc - ESA
D0: Designing Space Applications Using Synthesizable Cores
Abstract: habinc.pdf
Presentation: D0_Habinc_S.pdf
Paper: D0_Habinc_P.pdf
Abstract: conde.doc
Abstract: conde.pdf
Presentation: D1_Conde_S.PDF
Presentation: D1_Conde_S.ppt
Paper: D1_Conde_P.PDF
Paper: D1_Conde_P.doc
Rich Conde
JHU/APL
D1: "Adaptive Instrument Module through Programmable Logic"
Abstract: kleyner.pdf
Abstract: kleyner.doc
Presentation: D2_Kleyner_S.pdf
Presentation: D2_Kleyner_S.ppt
Paper: D2_Kleyner_P.pdf
Paper: D2_Kleyner_P.doc
Igor Kleyner
Orbital Sciences Corporation
D2: "Reconfigurable, System-on-Chip, High-Speed Data Processing and Data
Handling Electronics"
Abstract: lach.pdf
Abstract: lach.ps
Presentation: D3_Lach_S.pdf
Presentation: D3_Lach_S.ppt
Paper: D3_Lach_P.pdf
Paper: D3_Lach_P.doc
John Lach
UCLA Electrical Engineering Department
D3: "Runtime Logic and Interconnect Fault Recovery on Diverse FPGA
Architectures"
Abstract: doumar.pdf
Abstract: doumar.ps
Presentation: D4_Doumar_S.pdf
Presentation: D4_Doumar_S.ppt
Paper: D4_Doumar_P.pdf
Paper: D4_Doumar_P.ps
Abderrahim Doumar
Graduate School of Science and Technology
Chiba University
D4: "Fault Tolerant FPGAs by Shifting the Configuration Data"
Abstract: chu.pdf
Abstract: chu.doc
Presentation:
Presentation:
Paper: D5_Chu_P.pdf
Paper: D5_Chu_P.doc
Pong P. Chu
Department of Electrical and Computer Engineering, Cleveland State University
D5: "Design Techniques of FPGA Based
Random Number Generator"
Abstract: kim.pdf
Abstract: kim.doc
Presentation: D5A_Kim_S.pdf
Presentation: D5A_Kim_S.ppt
Paper: D5A_Kim_P.pdf
Paper: D5A_Kim_P.doc
Hea Joung Kim
The UCLA Department of Electrical Engineering
D5A: "Factoring Large Numbers w a Programmable Hardware Imithplementation of
Sieving"
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