PROGRAMMABLE TECHNOLOGIES WEB SITE

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.


MAPLD 99 Technical Program

Session B. Devices, Elements, and Technologies

 

B. Devices, Elements, and Technologies
Session Chair: Rich Katz - NASA Goddard Space Flight Center

Invited Speaker: John McCollum - Actel Corp.
B0: Programmable Elements and Their Impact on FPGA Architecture, Performance, and Radiation Hardness
Abstract: mccollum.pdf
Presentation: B0_McCollum_S.PDF
Presentation: B0_McCollum_S.ppt

 

Abstract: gibbons.pdf
Abstract: gibbons.doc
Presentation: B1_Gibbons_S.PDF
Presentation: B1_Gibbons_S.ppt
Paper: B1_Gibbons-Ames_P.PDF
Paper: B1_Gibbons-Ames_P.doc
Wally Gibbons
Space Dynamics Library, Utah State University
B1: "Use of FPGA's in critical space flight applications-A Hard Lesson"

Abstract: carmichael.txt
Presentation: B2A_Carmichael_S.PDF
Presentation: B2A_Carmichael_S.ppt
Paper: B2A_Camichael_S.PDF
Paper: B2A_Camichael_S.doc
Carl Carmichael
Xilinx Corporation
B2A: "SEU Mitigation Design Techniques for Radiation-Hardened Virtex Series FPGAs"

Abstract: edwards.pdf
Abstract: edwards.doc
Presentation: B3_Edwards_S.pdf
Presentation: B3_Edwards_S.ps
Paper: B3_Edwards_P.pdf
Paper: B3_Edwards_P.ps
R. Edwards
JHU/APL
B3: "Analog Module Architecture for Space Qualified Field Programmable Mixed Signal Arrays"

Abstract: cantle.pdf
Abstract: cantle.doc
Presentation: B4_cantle_S.PDF
Presentation: B4_cantle_S.ppt
Paper: B4_Cantle_S.PDF
Paper: B4_Cantle_P.doc
Allan J. Cantle
Nallatech Ltd.
B4: "A Foundation Architecture for Elevating DSP in FPGAs"

Abstract: zhang.txt
Presentation: B5_Zhang_S.PDF
Presentation: B5_Zhang_S.ppt
Paper: B5_Zhang_P.PDF
Paper: B5_Zhang_P.doc
Wei Zhang
University of Maryland, College Park
B5: "Laser-formed Vertical Metallic Link and Potential Implementation in Digital Logic Integration"

Abstract: speers.pdf
Abstract: speers.doc
Presentation: B6_Speers_S.pdf
Presentation: B6_Speers_S.ppt
Paper: B6_Speers_P.pdf
Paper: B6_Speers_P.doc
Ted Speers
Actel, Corp.
B6: "0.25 UM Flash Memory Based FPGA for Space Applications"


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Last Revised: January 09, 2002
Digital Engineering Institute
Web Grunt: Richard Katz