(MAPLD Conference)
PCD1: Neil W. Bergmann and Peter R. Sutton
Cooperative Research Centre for Satellite Systems, Queensland University of
Technology, Brisbane Australia
"A High-Performance Computing Module for a Low Earth Orbit Satellite using Reconfigurable Logic"
A combination of FPGAs and conventional processors (DSPs and/or mi in a high performance computing module which will be used to enhance the performance of an Australian low-earth orbit satellite, FedScroprocessors) are usedat-1, which will be operational in 2001. The high performance computer will provide additional hardware redundancy, on-board data processing, data filtering and data compression for science data, as well as allowing experiments in dynamic reconfigurability of satellite computing hardware in space. The paper will describe the payload, as well as examine the benefits of using reconfigurable logic, both from the satellite engineering aspects (eg. flexibility to make late reconfigurable circuit changes) and the satellite performance aspects (improved mission outcomes).
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