(MAPLD Conference)
PAB3: Paul McGaugh
and Kamal Khan
Southwest Institute and Actel Corporation
"VHDL Synthesis for Space Applications--Implementing VME Core in Actel RadHard Devices Using Actmap"
One of the main concerns
in space applications is the ability of the programmable logic device to withstand a high
radiation dose with improved Single Event Upset (SEU) and elimination of proton-SEU
sensitivity. Field Programmable Gate Array (FPGA) designs using High-level Design Language
(HDL) like VHDL requires that these concerns be given utmost importance while developing
the code. The code has to be written according to the environment conditions available to
the application. One may have to implement Triple Modular Redundancy (TMR), a well-known
technique for SEU mitigation, in their code or they may have to avoid using the SFF
portion of the S-module.
This paper presents a short analysis of implementing a VME Core in VHDL
using Actmap- Actel’s VHDL Synthesis tool. Various techniques are implemented and
studied according to their radiation-harness ability. The VMEbus has applications in the
electronic world as a global parallel interconnect supporting 8- 64 bit processors and
datapaths. Data transfers are based on a non-multiplexed asynchronous protocol, which
allows transfers between bus masters and slaves (e.g. processor and memory card) to be
performed at the highest speed that the slowest card will allow. Our application is the
implementation of the VME Core used on various boards including Command Telemetry Module
and Instrument Interface Module (IIM) using Actel Corporation RH1280 FPGA. These devices
offer a total dose radiation-harness in excess of 300K rads (Si) with guaranteed latch-up
immunity.
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