(MAPLD Conference)
A4: Raymond J. Andraka, P.E and Dr Richard Phelps
Andraka Consulting Group, Inc and Telephonics
"An FPGA based processor yields a real time high fidelity radar environment simulator."
Radar parametric testing has traditionally required either expensive trials in real-world situations (with many uncontrolled variables) or very limited 'canned' tests. The Von Neumann processors normally used for signal processing are severely limited in this application because of the inherently serial instruction stream. This paper discusses the use of FPGAs to accelerate the processing to obtain a near real time environment simulator. The FPGA logic handles the time-sensitive tasks such as target sorting, waveform generation, sea clutter modeling and noise generation. DSP microprocessors handle the less critical tasks like target movement and radar platform motion. The result is a simulator that simultaneously produces several hundred independent moving targets, realistic sea clutter, land masses, weather, jammers and receiver noise.
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