Ronald Reagan Building and International Trade Center
Washington, D.C.
September 9-11, 2003
Session Chairs:
James W. Howard, Jr. - Jackson and Tull Chartered Engineers
Ken LaBel - NASA Goddard Space Flight Center
8:00 am Paper C1
"Selective Triple Modular Redundancy for SEU Mitigation in FPGAs"
Praveen Kumar Samudrala1, Jeremy Ramos2, and Srinivas Katkoori1
1 University of South Florida
2 Honeywell Space Systems Inc.
Abstract: samudrala_a.pdf
Presentation: c1_samudrala_s.ppt
Paper: c1_samudrala_p.pdf8:25 am Paper C2
"SEU Tolerant Controls for a Space Application based on Dynamically Reconfigurable FPGA"
Stefano Baldacci, Francesco Cuzzocrea, Alessandro Donati, and Tommaso Ramacciotti
Kayser Italia Srl. Livorno Italy
Abstract: baldacci_a.html
Presentation: c2_baldacci_s.ppt
Paper: c2_baldacci_p.doc8:50 am Paper C3
"A Radiation Hardened by Design Approach to Solve Single Event Upsets"
David W. Jensen, Steven E. Koenck, and Alan C. Tribble
Rockwell Collins, Advanced Technology Center
Abstract: jensen_a.html, jensen_a.doc, jensen_a.pdf
Presentation: c3_jensen_s.ppt9:15 am Break In The Pavilion 10:00 am Paper C4
"Soft Error Rate of FLASH based FPGA in Terrestrial Environments"
J.J. Wang1, Brian Cronquist1, John McCollum1, Richard Katz2, and Igor Kleyner3
1 Actel Corporation
2 NASA Office of Logic Design
3 Orbital Sciences Corp.
Abstract: wang_a.html
Presentation: c4_wang_s.ppt10:25 am Paper C5
"NSEU Sensitivity of SRAM-based FPGAs"
Joe Fabula, Austin Lesea, Carl Carmichael, and Saar Drimer
Xilinx Corp.
Abstract: fabula_a.html
Presentation: c5_fabula_s.ppt10:50 am Paper C6
"Consequences and Categories of SRAM FPGA Configuration SEUs"
Paul Graham1, Michael Caffrey1, Michael Wirthlin2, Eric Johnson2, and Nathan Rollins2
1 Los Alamos National Laboratory
2 Brigham Young University
Abstract: graham_a.pdf
Presentation: c6_graham_s.pdf
Paper: c6_graham_p.pdf
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October 06, 2003
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