2003 MAPLD International Conference Panel
Wednesday Evening, September 10, 2003
Dr. Rod Barto, Panel Moderator
Biography
Rod Barto CV
Digital Electronics Consultant
El Paso, Texas 79904
915-755-4744
email: rbarto@klabs.orgEDUCATION:
- Ph.D., 1980, University of Texas (Electrical Engineering) Thesis: A Computer Architecture for Logic Simulation (S.A. Szygenda)
- M.S., 1975, University of Texas, El Paso (Mathematics)
- B.S., 1973, University of Texas, El Paso (Mathematics)
RESEARCH INTERESTS:
Design and analysis methodologies. Special purpose computer architectures. Fault-tolerant computers. Logic simulation accelerators.
EXPERIENCE:
- 1996- Engineering Consultant
- 1997-98 Instructor, Doņa Ana Community College (NMSU, Las Cruces, New Mexico)
- 1990-95 Senior Engineer, International Telecommunications Satellite Organization
- 1991-92 Adjunct Faculty, National University (San Jose, California)
- 1988-90 Senior Engineer, KLA Instruments (San Jose, California)
- 1986-88 Engineer, Jet Propulsion Laboratory
- 1986 Senior Engineer, GE Calma (Milpitas, California)
- 1980-86 Staff Engineer, Martin Marietta Aerospace (Denver, Colorado)
- 1976-80 Engineer, Millimeter Wave Laboratory, University of Texas
PUBLICATIONS:
SEU Induced Anomalous Operation of Voted Ripple Clocks, Mil/Aero Applications of Programmable Logic Devices International Conference, 1999.
- Architecture for a Hardware Simulator
, ICCC 1980- The Impact of Reliability and Performance Requirements on VLSI Design
, ICCD 1983.- R. Katz, R. Barto, P. McKerracher, B. Carkhuff, R. Koga: SEU Hardening of Field Programmable Gate Arrays (FPGAs) for Space Applications and Device Characterization , IEEE Nuclear and Space Radiation Conference, 1994
MAJOR PROJECT INVOLVEMENT:
- Galileo
- Magellan
- NASA Scatterometer
- INTELSAT I-7, I-8, I-9.
PROFESSIONAL HONORS:
NASA Public Service Medal, 1991 (Galileo AACS design)
Home - NASA Office of Logic Design
Last Revised: March 06, 2003
Digital Engineering Institute
Web Grunt: Richard Katz
