Sharon Lim Siok Lin1, Ian McLoughlin2, Timo Bretschneider1, Heiko Schröder3
1 Satellite Engineering Centre, Nanyang Technological University, Singapore
2 TAIT Electronics Ltd., Christchurch, New Zealand
3 Department of Computer Engineering, University of RMIT, AustraliaAbstract:
One of the current trends in space missions is an increased autonomy of the spacecraft regardless whether it is a satellite, shuttle, space station or rover / robot. The causes are manifold but the main reason is the increased amount of acquired data and the growing complexity of the individual missions. Thus the traditional approach of processing the data on the ground by powerful computers is no longer suitable since the possible transmission rates impose a bottleneck. Instead the computation has to be done onboard. Recent missions like the ESA satellite Proba proved the general feasibility.
The main requirements for onboard processing are reliability and fault tolerance, which are achieved through rigid engineering mechanisms. Therefore mainly radiation-hardened components are utilised. However, these have several drawbacks, e.g. higher prices than the compatible standard components, increased size and larger power consumption. In particular the processing power of radiation-hardened processors is less with respect to nowadays available components off the shelf (COTS). Last but not least space-hardened parts are not freely obtainable around the world. Obviously the usage of COTS is advantageous if the aspects of reliability and fault tolerance can be guaranteed. One possible solution to the problem is a mixed design philosophy whereby parallelism with voting mechanisms is applied if standard components are used and radiation-hardened parts to avoid single point failures. This paper proposes a parallel architecture based on the mentioned mixed design philosophy for an onboard data processing unit.
The parallel processing unit (PPU) is a cluster of 20 processing elements interconnected via four central FPGAs. Each cluster node consists of a StrongArm SA1110 processor, which was chosen because of its superior ratio of MIPS per watt. The local memory of 64MByte for every processor enables a high degree of parallelism. Reconfigurable radiation-hardened Xilinx Virtex FPGAs were selected for the interconnection of the compute nodes to route packets and to provide a pre-processing capability in realtime during data transfers. The usage of FPGAs provides the full flexibility in designing almost arbitrary network topologies for different distributed processing strategies. The intra-FPGA links operate at 160Mbits/s, while the FPGA-processor links are 16-bit wide buses, capable of up to 640Mbits/s.
The internal PPU architecture is essentially symmetric and easily modified in terms of scalability for future missions. However, the external PPU interfaces are asymmetric. Only two FPGAs have external interfaces to the outside modules and thus simplifying the integration in other spacecrafts. The connecting FPGAs can simultaneously read and write data from a 2GByte mass storage device via dedicated low-voltage differential signalling (LVDS) links operating at 160Mbits/s. They can also receive commands from other sub-systems via the redundant two controller area network (CAN) buses.
The space-hardened FPGAs are used for protection against radiation dosage and single event upsets while the usage of less reliable COTS is enabled by incorporating processor redundancy, autonomous processor remapping algorithms, and internal error detection and correction (EDAC) mechanisms. An in-depth analysis investigates the attained reliability factor and compares it to other missions based on the usage of radiation-hardened components throughout the entire system.
In the current mission outline of the PPU, it is mainly used for post-processing of acquired images from a multispectral camera payload. The computational power of the PPU is desired for specialised image processing like realtime compression and unsupervised analysis to optimise the utilisation of the downlink bandwidth. Furthermore the PPU is utilised for attitude determination and control whereby for this application the parallelism is utilised to guarantee reliability and fault tolerance. Currently additional usage of the PPU, i.e. for the investigation of the atmosphere by means of GPS measurements, is investigated.
In conclusion the paper shows that parallelism together with fault tolerant concepts is a powerful combination since it enables the cost effective design of a new generation of space computers. Moreover it makes high-speed computation in the harsh radiation environment feasible. The PPU is one of the payloads of the X-Sat, a micro-satellite built by Nanyang Technological University, which is scheduled for launch in 2006.