Area Array Assembly Reliability and Qualification for Spaceflight Missions

R. Ghaffarian
Jet Propulsion Laboratory, California Institute of Technology

Summary

This paper provides an overview for designing, manufacturing, and testing printed wiring assemblies populated with ball grid arrays (BGA) and chip scale packages (CSPs). NASA Headquarters, Code AE and Code Q, has funded numerous tasks for the last several years to investigate the use of BGAs and CSPs for potential spaceflight missions.

The objectives of the NEPP (NASA Electronic Parts and Packaging) Program area array (BGA and CSP) projects were to evaluate the quality and reliability of these technologies and to assist in the development of the rapidly growing associated industrial infrastructure. This was successfully accomplished by organizing industry-wide consortia, led by the NEPP Program to address many issues with this technology. An overview of test results and recommendations is reported. In addition, the author, as chairperson and in collaboration with industry, released findings as industry qualification specification, IPC 9701, ”Performance Test Methods and Qualification Requirements for Surface Mount Solder Attachments”. This was published by IPC, Association Connecting Electronics Industries. The key aspect of this specifications and others qualification approaches including the IPC 9702, that is being prepared to cover the mechanical requirement aspects of this technology, are also discussed.