PROGRAMMABLE TECHNOLOGIES WEB SITE

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.

2002 MAPLD International Conference

Schedule (Preliminary)

Kossiakoff Conference Center
The Johns Hopkins University- Applied Physics Laboratory
11100 Johns Hopkins Road
Laurel, Maryland 20723-6099

September 10-12, 2002

Monday, September 9, 2002

Tuesday, September 10, 2002

Wednesday, September 11, 2002

Thursday, September 12, 2002

Monday, September 9, 2002

Seminars and Tutorials (Separate Registration)

Logic Design: Clocking, Timing Analysis, Finite State Machines, and Verification
9 am to 12 noon; 1 - 4 pm

Programmable Logic in the Radiation Environment (3 hours, morning).
9 am to 12 noon

Dr. Nancy Leveson
Professor of Aeronautics and Astronautics, Massachusetts Institute of Technology
AIAA Invited Speaker

"Do You Know What Your Software is Doing Right Now?
Accidents and Mishaps Involving Software"
Hors D'oeuvres/Cash Bar: 6:30 pm.  Talk begins at 7:15 pm

Tuesday, September 10, 2002

Welcome  8:50 - 9:00 am

Rich. Katz, Grunt Engineer
NASA Goddard Space Flight Center

Session A - Applications: Military & Aerospace
Session Chair: Ralph Kohler - Air Force Research Laboratory

Paper A0: Invited Talk   9:00 - 10:00 am
Ed Euler and Steven Jolly, Lockheed Martin Astronautics Operations
Recovery from the Mars Surveyor '98 Failures: Lessons Learned and Applied

Paper A1:  10:00 - 10:25 am
"Programmable Logic within NASA"
Kalynnda M. Berens, Software Assurance and Safety Engineer
SAIC contractor at the NASA Glenn Research Center

BREAK - 10:25 - 10:50 am

Paper A2:   10:50 - 11:15 am
"A Space-Based Reconfigurable Radio"
Michael Caffrey, Los Alamos National Laboratory

Paper A3   11:15 - 11:40 am
"Energy-Efficient Design of Kernel Applications for FPGAs Through Domain-Specific Modeling"
Ronald Scrofano, Seonil Choi, and Viktor K. Prasanna
Department of Electrical Engineering-Systems, University of Southern California

Paper A4   11:40 am - 12:05 pm
"Design and Synthesis of Small and Fast Finite Field Multipliers for FPGAs"
Gregory C Ahlquist¹, Brent E. Nelson², and Michael D. Rice^2
1 Air Force Institute of Technology/LSS, Wright-Patterson AFB, ² Department of Electrical and Computer Engineering, Brigham Young University

Paper A5
12:05 - 12:30 pm
"A Fast Transform DSP Coprocessor"
Anja Zoe Christen¹, Uwe Liebstueckel¹, and Laurens Bierens^2
1 Astrium GmbH, ² DoubleBW Systems B.V

LUNCH 12:30 - 1:30 pm

Session B: Design 1: Logic Design and Programmable Devices
Session Chair: Rich Katz - NASA Goddard Space Flight Center

B0: History Invited Talk   1:30 - 3:00 pm
Allan J. McDonald, ATK Thiokol Propulsion
The Challenger Accident

BREAK 3:00 - 3:15 pm

Paper B1  3:15 - 3:40 pm
"ESA FPGA Task Force: Lessons Learned"
A. Fernández-León ¹, A. Pouponnot ² and S. Habinc ^3
1European Space Agency ESTEC D/TOS-ESM/AFL, ²European Space Agency ESTEC D/TOS-ESD/AP, ³Gaisler Research, Gothenburg, Sweden

Paper B2   3:40 - 4:05 pm
"Implementation of Gigahertz 1-bit Full Adder on SiGe FPGA"
K. Zhou, Channakeshav, R. Kraft, J. F. McDonald, Rensselaer Polytechnic Institute

Paper B3   4:05 - 4:30 pm
"Accelerating Image Processing Pipelines in a Hardware/Software Environment"
Heather Quinn, Miriam Leeser, and Laurie Smith King
Northeastern University, College of the Holy Cross, Northeastern University

BREAK 4:30 - 4:45

Paper B4   4:45 - 5:10 pm
"Low Complexity Method for Detecting Configuration Upset in SRAM Based FPGAs"
Raymond J. Andraka and Jennifer L. Brady, Andraka Consulting Group, Inc.

Paper B5   5:10 - 5:35 pm
"Designing For Signal and Power Integrity in FPGA Systems"
Mark Alexander, Xilinx, Inc.

Paper B6   5:35  - 6:00 pm
"Improving Detectability of Resistive Open Defects in FPGA"
Mehdi Baradaran Tahoori and Edward J. McCluskey, Center for Reliable Computing, Stanford University

Cocktail Party, Dinner
Entertainment: Jackie Capecci

Keynote Address: Major General Richard A. Hack, Chief of Staff, U.S. Army Materiel Command
Cocktails and Dinner from 6:00 - 7:45 pm, Tuesday, September 10, 2002.
Keynote Address starts at 7:45 pm.

Wednesday, September 11, 2002

Session C. Reliability: Devices and The Effects of the Radiation Environment
Session Chairs:
Dr. James W. Howard, Jr. - Jackson and Tull Chartered Engineers
Ken LaBel - NASA Goddard Space Flight Center

September, 11, Activities.  8:45 - 9:30 am

We anticipate that from 8:45 to 9:30 am there will be various addresses and speeches.  These will be covered and presented in the auditorium.
Dr. John Sommerer, Director, Research and Technology Development, The Johns Hopkins University Applied Physics Laboratory

Paper C1   9:30 - 9:55 am

Paper C1A
"Single Event Effects Characterization of the AD8151 Digital Cross Point Switch"
Stephen Buchner¹, Paul Marshall², Jim Howard³, Marty Carts⁴, Robert Reed⁵ and Ken LaBel^5
1QSS, ²Consultant, ³Jackson and Tull, ⁴Raytheon, ⁵NASA Goddard Space Flight Center

Paper C1B
"Radiation Testing of Two High Speed Communication Networks"
Jim Howard¹, Steve Buchner², Paul Marshall³, Ken LaBel⁴, Hak Kim², Marty Carts⁵, Christina Seidleck⁵, Ron Stattel⁵, Charlie Rogers⁵, and Tim Irwin^2
1 Jackson & Tull Chartered Engineers, ² QSS, Inc., ³ Consultant, ⁴ NASA Goddard Space Flight Center, ⁵ Raytheon ITSS

Paper C2   9:55 - 10:20 am
"Single Event effects of 0.15µm Antifuse FPGA"
J. J. Wang¹, B. Cronquist¹, J. McCollum¹, I. Kleyner², and R. Katz^3
1 Actel Corp, Sunnyvale, CA 94085, ² Orbital Science Corp, Greenbelt, MD 20771, ³ NASA/GSFC, Greenbelt, MD 20771

Talk IE0   10:20 - 10:40 am
"Military, Aerospace, and PLDs: A CEO's View"
John East, President and CEO, Actel Corporation

Industrial Exhibits and Break 10:40 - 11:00 am

Paper C3   11:00 - 11:25 am
"Reliability of Programmable Input/Output Pins in the Presence of Configuration Upsets"
Michael Wirthlin¹, Nathan Rollins¹, Michael Caffrey², and Paul Graham^2
1 BYU, ² Los Alamos National Laboratory

Paper C4   11:25 - 11:50 am
"Post Programming Burn In (PPBI) for RT54SXS Actel FPGAs"
Dan Elftmann and Minal Sawant, Actel Corporation

Paper C5   11:50 am - 12:15 pm
"Where is 'The Weakest Link?' Aeroflex UTMC’S Reliability Analysis For Antifuse FPGA’S"
Ron Lake, Aeroflex UTMC

LUNCH 12:15 - 1:45 pm

Session D. Design 2: Systems and Platforms
Session Chairs
Dr. Tanya Vladimirova, University of Surrey; Agustin Fernandez-Leon, European Space Agency

Paper D1   1:45 - 2:10 pm
"Scientific Computations on a NASA Reconfigurable Hypercomputer"
Olaf O. Storaasli¹, Robert C. Singleterry¹, and Sam Brown^2
1 NASA Langley, Hampton VA, ² Star Bridge Systems, Midvale UT

Paper D2   2:10 - 2:35 pm
"Reconfigurable Computing Applied to Problems in Communications Security"
Duncan A. Buell and James P. Davis, Department of Computer Science and Engineering, University of South Carolina

Paper D3   2:35 - 3:00 pm
"Implementation Trade-offs of Triple-DES in the SRC Reconfigurable Computing Environment"
Osman Devrim Fidanci, Hatim Diab, Tarek El-Ghazawi, and Nikitas Alexandridis
Dept. of Electrical and Computer Engineering, The George Washington University

POSTER SESSION AND BREAK 3:00 - 3:55 PM

Paper D5   3:55 - 4:20 pm
"A CCSDS-Based Communication System for a Single Chip On-Board Computer"
Daixun Zheng,  Tanya Vladimirova, and Martin Sweeting, Surrey Space Centre, University of Surrey

Paper D6   4:20 - 4:45 pm

Robin Coxe¹, William Marinelli¹, Creigh Gordon^2
1Physical Sciences Inc., ²Air Force Research Laboratory (AFRL/VSSE)
"Development of a Remotely Reconfigurable Integrated Image Processing Platform [RIP]"

Trivia Contest, Cocktail Party and Dinner 4:45 - 6:15 pm w/ Jazz Band

Panel Session - 6:15 pm until ...

Why Is Mars So Hard?

A Discussion of the Technical, Programmatic, and Political Factors
That Have Lead To Failures at Mars over the Last 40 Years

Panel Moderator: Dr. Rod Barto (Bio)

"Review of the Mars Odyssey Red Team Review"
Rod Barto, Spacecraft Digital Electronics

Introduction: "A Historical Perspective"
Dr. Roger Launius (Bio), Chair, Dept. of Space History, National Air and Space Museum

• Dr. Ed Euler, Lockheed Martin Astronautics Operations
• Orlando Figueroa (bio), Director, Mars Exploration Program Office, NASA
• Dr. Stamatios M. (Tom) Krimigis (bio), Head, Space Department, Johns Hopkins University/Applied Physics Lab
• Ken Ledbetter (bio), Executive Director for Programs in the Office of Space Science (OSS) at NASA Headquarters
• James Oberg (bio), Soaring Hawk Productions, Inc. (Consultant and Author)
• Anthony Spear (bio), JPL, Chair, NASA Faster, Better, Cheaper (FBC) Task Force; Mars Pathfinder Project Manager, Magellan Project Manager
• Dr. Robert Zubrin (bio), President, Mars Society

Thursday, September 12, 2002

Design 3: Evolvable Hardware and Other Systems and Architectures
Session Chair: John McHenry - National Security Agency

Paper E1   9:00 - 9:25 am
"Evolution-enabled Reconfigurable Computing using Field-Programmable Analog Devices"
Adrian Stoica¹, Xin Guo², Ricardo S. Zebulum¹, M. I. Ferguson¹, Didier Keymeulen¹, and Taher Daud^1
1Jet Propulsion Laboratory Pasadena, CA 91109, ²Chromatech, Alameda CA 94501

Paper E2   9:25 - 9:50 am
"Grow Your Own Circuits"
R. Timothy Edwards, Johns Hopkins University Applied Physics Lab

Paper E3   9:50 - 10:15 am
"Evolvable Random Number Generators: A Few Ants in Your Hardware could be a Good Thing"
Jason C. Isaacs, Robert K. Watkins, and Simon Y. Foo, Department of Electrical Engineering, FAMU-FSU College of Engineering

Paper E4   10:15 - 10:40 am
"A Genetic Representation for Evolutionary Fault Recovery in FPGAs"
Jason D. Lohn¹ and Ronald F. DeMara^2
1 NASA Ames Research Center, ² University of Central Florida

BREAK 10:40 - 11:00 am

Paper E5   11:00 - 11:25 am
"On-Board Device and System Architectures with the Version-Thrshold Adaptation to Hardware and Software Faults"
Vyacheslav S. Kharchenko¹ and V.V. Sklyar^2
1Aerospace University, Ukraine, ²Kharkiv Military University, Ukraine

Paper E6   11:25 - 11:50 am
"A Reconfigurable Instruction Set Microcomputer"
Clay Gloster, Jr., and Esther Dickens, Department of Electrical Engineering, Howard University

Paper E7   11:50 am - 12:15 pm
"Embedded Computer System with Soft Core CPU for Space Application"
T.Takahara^B, Y.Kurahashi^C, T.Mizuno^A, H.Saito^A, N.Tomita^B
A The Institute of Space and Astronautical Science, ^B Musashi Institute of Technology, ^C Tokyo University of Science

LUNCH: Pizza Party 12:15 - 1:00 pm

Paper E8   1:00 - 1:25 pm
"Adaptive Computing Enables High Performance and Low Power Consumption in Next-Generation Mobile and Wireless Systems"
Paul Master, QuickSilver Technology

Paper E9   1:15 - 1:50 pm
"A Hardware Debugging Environment for FPGA-Based Systems"
Karen A. Tomko and Faisal Muslehuddin
Department of Electrical and Computer Engineering and Computer Science, University of Cincinnati

Paper E10   1:50 - 2:15 pm
"Construction of quickly operating and highly failure resisting processors of digital information processing functioning in the real time scale"
I.Furman and V.Krasnobaev, Kharkiv State Technical University

Paper E11   2:15 - 2:40 pm
"A Configurable Architecture for High-Speed Communication Systems"
Visvanathan Subramanian, Joseph G. Tront, Charles W. Bostian, Scott F. Midkiff
Center for Wireless Telecommunication, Virginia Polytechnic Institute and State University,

Conference  Closes

Home
Last Revised: August 29, 2002
Digital Engineering Institute
Web Grunt: Richard Katz