A Configurable Architecture for High-Speed Communication Systems
Visvanathan Subramanian, Joseph G. Tront, Charles W. Bostian, Scott F. Midkiff
Center for Wireless Telecommunication
Virginia Polytechnic Institute and State University,
Abstract
This paper presents the experiences derived from the design of a broadband wireless Gateway prototype of a rapidly deployable "last mile" wireless high-speed communications system to support emergency management. The system utilizes surviving network infrastructure to provide network connectivity to field workers responding to emergencies or disasters for applications such as Internet Access, Audio/Video conferencing, Geographic Information System (GIS) access. Virginia Tech, in conjunction with partner SAIC, is designing the system architecture, developing and/or integrating radio, link, network, and application level hardware and software. The high data rate (up to 120 Mbps) system is designed to incorporate innovative features that support rapid deployment and robust operation, including a built-in channel sounder and adaptive link layer protocols.
Fig.1 System Overview
One of the important elements of this research is the development of a broadband wireless gateway prototyping platform. There is a growing need to develop high performance communication systems that can satisfy high-end data processing requirements inherent in these technologies. Designers of broadband wireless communication systems face the following challenges:
- Several difficult and interesting issues related to access mechanisms, error rates, transmission rates and bandwidth need to be addressed
- High level protocol descriptions have to be rapidly translated into hardware and software that implement the system
- A thorough test and verification process within shrinking time-to-market windows
- Minimize risk of costly hardware and software redesigns
The speed and complexity of these systems necessitates designers to break away from traditional architectures and design methodologies. Designers must leverage new technology and resources like specialized Communication and Networking processors and High density FPGAs to achieve rapid system level prototyping. Field-programmable gate arrays (FPGA) offer an attractive alternative to the low efficiency of Digital Signal Processors (DSP) based systems and low flexibility of Application Specific Integrated Circuits (ASIC). The availability of high-density, high performance field-programmable gate arrays with several capabilities, like embedded memory and advanced routing, together with the adaptability that they offer make them highly desirable for developing hardware prototypes of communication systems.
The proposed gateway architecture combines the high performance of a specialized Motorola Communications Processor (PowerQuicc II - MPC8255) and the flexibility of a high density FPGA. The architecture is FPGA centric with multiple scattered Direct Memory Access (DMA)-like structures that take advantage of parallelism to cascade data between the processing stages, thus reducing processor load.
Fig.2 Prototyping Platform Architecture