NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.

2002 MAPLD Technical Program

Session B. Design 1: Logic Design and Programmable Devices

Tuesday, September 10, 2002

Session Chair: Rich Katz - NASA Goddard Space Flight Center
Pictures from Session B

B0: History Invited Talk
Introduction: Dr. Roger D. Launius
NASA Chief Historian, Chair, Dept. of Space History, National Air and Space Museum
Allan J. McDonald
ATK Thiokol Propulsion
Presentation: b0_mcdonald_s.pdf, b0_mcdonald_s.ppt
Backup: b0_mcdonald_s_backup.pdf, b0_mcdonald_s_backup.ppt

BREAK 3:00 - 3:15 pm

Paper B1
"ESA FPGA Task Force: Lessons Learned"
A. Fernández-León ¹, A. Pouponnot ² and S. Habinc ^3
1European Space Agency ESTEC D/TOS-ESM/AFL
²European Space Agency ESTEC D/TOS-ESD/AP
³Gaisler Research, Gothenburg, Sweden
Abstract: fernandez-Leon_a.pdf,  fernandez-Leon_a.doc
Presentation: b1_fernandez_leon_s.pdf, b1_fernandez_leon_s.ppt
Paper: b1_fernandez_leon_p.pdf, b1_fernandez_leon_p.doc

Paper B2
"Implementation of Gigahertz 1-bit Full Adder on SiGe FPGA"
K. Zhou, Channakeshav, R. Kraft, J. F. McDonald
Rensselaer Polytechnic Institute
Abstract: zhou_a.pdf
Presentation: b2_zhou_s.pdf, b2_zhou_s.ppt
Paper:  b2_zhou_p.pdf, b2_zhou_p.doc

Paper B3
"Accelerating Image Processing Pipelines in a Hardware/Software Environment"
Heather Quinn, Miriam Leeser, and Laurie Smith King
Northeastern University
College of the Holy Cross
Northeastern University
Abstract: quinn_a.htm,  quinn_a.pdf,  quinn_a.doc
Presentation: b3_quinn_s.pdf, b3_quinn_s.ppt
Paper: 

Paper B4
"Low Complexity Method for Detecting Configuration Upset in SRAM Based FPGAs"
Raymond J. Andraka and Jennifer L. Brady
Andraka Consulting Group, Inc.
Abstract: andraka_a.htm
Presentation: b4_andraka.pdf, b4_andraka.ppt
Paper:  b4_andraka_p.pdf

Paper B5
"Designing For Signal and Power Integrity in FPGA Systems"
Mark Alexander
Xilinx, Inc.
Abstract: alexander_a.htm
Presentation: b5_alexander_s.pdf, b5_alexander_s.ppt
Paper: b5_alexander_p.pdf

Paper B6
"Improving Detectability of Resistive Open Defects in FPGA"
Mehdi Baradaran Tahoori and Edward J. McCluskey
Center for Reliable Computing
Stanford University
Abstract: tahoori_a.pdf
Presentation: b6_tahoori_s.pdf, b6_tahoori_s.ppt
Paper: b6_tahoori_s.pdf

Cocktail Party, Dinner
Entertainment: Jackie Capecci http://www.tuxedoparkstrings.com/

 

Keynote Address: Major General Richard A. Hack, Chief of Staff, U.S. Army Materiel Command - Hoo-ah!

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Last Revised: June 30, 2003
Digital Engineering Institute
Web Grunt: Richard Katz