A scientific study of the problems of digital
engineering for space flight systems,
with a view to their practical solution.
Session Chair: John McHenry - National Security Agency
E0: Invited Talk
Dr. Steven Guccione - Xilinx Corporation
FPGAs for Fault Tolerant Circuits
Presentation: E0_Guccione_S.ppt
Paper E1
"Programmable Logic in Fault-Tolerant Design"
Krenz, Rene
IMIT, KTH-Stockholm
Abstract: Bengtsson_T.pdf
Abstract: Bengtsson_T.ps
Presentation: E1_Bengtsson_S.ppt
Presentation: E1_Bengtsson_S.pdf
Paper: E1_Bengtsson_P.pdf
Paper E2
"The Multiversion Design Technology of an Onboard Fault-Tolerant FPGA
Devices"
Kharchenko1, Vyacheslav S., Vitaliy V.Tarasenko2
1Zhukovsky National Aerospace University
2Polisvit
Abstract: Kharchenko_A.pdf
Abstract: Kharchenko_A.doc
Presentation: E2_Kharchenko_S1.pdf
Presentation: E2_Kharchenko_S1.doc
Presentation: E2_Kharchenko_S1.ps
Paper: E2_Kharchenko_A.pdf
Paper: E2_Kharchenko_A.doc
BREAK
Paper E3
"Mitigation of Single Event Upset (SEU) by Virtual Redundancy in Design"
Wu, Kaijie1, and Jake Karrfalt2
1Polytechnic University, Brooklyn
2Alternative System Concepts, Inc.
Abstract: Wu_A.txt
Presentation: E3_Wu_S.ppt
Presentation: E3_Wu_S.pdf
Paper: E3_Wu_P.pdf
Paper: E3_Wu_P.doc
Paper E4
"Software/Hardware Reconfigurable Network Processor for Space Networks"
Lee, Clement G., Andrew A. Gray, Jeffrey M. Srinivasan, Yong J. Chong,
Allen H. Farrington, Kenneth J. Peters, and Valerie M. Stanton
Jet Propulsion Laboratory
Abstract: Lee_A.pdf
Abstract: Lee_A.doc
Presentation: E4_Lee_S.ppt
Presentation: E4_Lee_S.pdf
Paper: E4_Lee_P.pdf
Paper E5
"Testing FPGA Devices using JBits"
Sundararajan, Prasanna
Xilinx Inc
Abstract: Sundararajan_A.pdf
Presentation: E5_Sundararajan_S.ppt
Presentation: E5_Sundararajan_S.pdf
Paper: E5_Sundararajan_P.pdf
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