Session Chair: Ralph Kohler - Air Force Research Laboratory
Session Pictures: Images_A.htm
Keynote Address
A0: Faster, Better, But Most Important, Much Much Cheaper
Henry Spencer - SP Systems
Abstract: A0_Spencer_A.htm
Presentation: A0_Spencer_S.ps
Presentation: A0_Spencer_S.pdf
Picture: A0_Spencer.jpg, A0_Spencer2.jpg
A1: Design of Real-time, 50 to 100 Ms/s, Signal Parameter Estimation Using FPGAs
Robert Bassett
Sanders, A Lockheed-Martin Company
Abstract: Bassett_A.pdf
Abstract: Bassett_A.doc
Presentation: A1_Bassett_S.pdf
Presentation: A1_Bassett_S.ppt
Picture: A1_Bassett.jpg, A1_Bassett2.jpg
A2: Wave Division Multiplexing Routing on FPGAs
Lou Pochet
Rome Research Site, AFRL
Abstract: pochet_a.pdf
Abstract: pochet_a.doc
Presentation: A2_Pochet_S.pdf
Presentation: A2_Pochet_S.ppt
Paper: A2_Pochet_P.pdf
Paper: A2_Pochet_P.doc
Picture: A2_Pochet.jpg, A2_Pochet2.jpg
A3: Faster, Better, Cheaper Space Flight Electronics - An Analytical Case Study
Richard B. Katz
NASA Goddard Space Flight Center
Abstract: Katz_FBC_A.pdf
Abstract: Katz_FBC_A.doc
Presentation: A3_Katz_S.pdf
Presentation: A3_Katz_S.ppt
Picture: A3_Katz.jpg
A4: Sequential Circuit Design for Spaceborne and Critical
Electronics
R. Barto
Spacecraft Digital Electronics
Abstract: Barto2_A.pdf
Abstract: Barto2_A.doc
Presentation: A4_Barto_S.pdf
Presentation: A4_Barto_S.ppt
Picture: A4_Barto.jpg, A4_Barto2.jpg
A5: Asynchronous FPGA Risks
Ken Erickson
Jet Propulsion Laboratory
Abstract: Erickson_A.pdf
Abstract: Erickson_A.doc
Presentation: A5_Erickson_S.pdf
Presentation: A5_Erickson_S.ppt
Paper: A5_Erickson_P.pdf
Paper: A5_Erickson_P.doc
Picture: A5_Erickson.jpg, A5_Erickson2.jpg
A6: Minimizing Power Consumption using Signal Activity Transformations for Very
Deep FPGA Pipelines
Jeffrey Muehring
School of Computer Science
University of Oklahoma
Abstract: Muehring_A.pdf
Abstract: Muehring _A.doc
Presentation: A6_Muehring_S.pdf
Presentation: A6_Muehring_S.ppt
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Last Revised: January 09, 2002
Digital Engineering Institute
Web Grunt: Richard Katz
