"An SEU-Mitigated FPGA-Based Flash Memory Controller for Space Applications"

Greg Allen, Gary Swift, and Xilinx Radiation Test Consortium
California Institute of Technology, Jet Propulsion Laboratory

Abstract

The use of embedded, reconfigurable processors in space systems is an enabling technology that will increase computing power and avionic performance, and decrease cost by orders of magnitude. The use of FPGAs with embedded processors is a very enabling means of implementing scalable, embedded computing.  There are several components that are necessary to be implemented in a FPGAs configuration to enable the embedded processor to communicate with external devices.  We will discuss the development and SEU testing of one such component, a Non Volatile-RAM (flash) IP core.  We will discuss the mitigation techniques required to implement such a core in a space environment. 

 

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