"Antifuse Rupture from Heavy Ions in Actel FPGAs"

Gary Swift
JPL/Caltech

 

Abstract

Recently, differences in reliability between Actel amorphous-Si antifuses for the "same" FPGA from two different foundries has highlighted the fact that not all antifuses are "created equal." However, the physics of single event dielectric rupture (SEDR) holds across different dielectric materials and even different electrical uses (for example, in addition to antifuses, dielectrics are critical to capacitor and transistor gate function). In particular, the physical mechanism of SEDR exhibits a very strong dependence on applied electric field. For example, earlier results showed that, for the ONO antifuse of Actel's A1280, varying the bias within specification, i.e., from 4.5V to 5.5V, changed the SEDR susceptibility about four orders of magnitude. This paper highlights newer experimental results on UMC-foundry antifuses that show consistency with that older result on remarkably different amorphous-Si antifuse.

Comparison with the results of MEC-foundry amorphous-Si antifuses shows that the UMC antifuse is somewhat more susceptible to SEDR. However, the number of ions in the space environment that have linear energy transfers (LET) or deposited specific energies high enough to initiate SEDR on a biased antifuse is remarkably low in either case. Thus, the space rate of SEDR remains so low as to be of only "academic" interest.

 

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