Test synopsis V. 2.1
7-Nov-96
Heavy ion single event effect (SEE) testing was performed at BNL on September 4th and 22nd, 1996 on the following device:
MFR National Semi Process CS065 CMOS Device Part# CLAy-31 Epi TBS LOT Number F006E0920 Configuration 64Kx1(8Kused) Wafer Number 4 RAM in bits Vcc 5V Usable Gates/ 3136/3022 stage Package 132-pin TQFP Test Design shift reg.
The CLAy-31 is the largest member of the family.
The device is a RAM-based programmable devices with schematic configurations downloaded via an EPROM external to the device.
Test modes used were:
- Dynamic: While being irradiated, a 1 Mhz clock is fed through 3022 stage shift register.
Nominal operating current during testing was 22 mA. Latchup current was defined as 80 mA (arbitrary). Two device samples were irradiated during experimentation.
SEU tests were performed with a nominal Vcc of 5V at the vacuum chamber ambient temperature (~25C), while SEL tests were performed at both 5 and 5.5V at a temperature of 70C. Particle fluences for LET threshold tests and for SEL were at 1E6 particles/cm2.
Ions used for testing were:
Ion Energy LET at normal incidence F-19 140 MeV 3.38 MeV*cm2/mg Si-28 186 MeV 7.88 MeV*cm2/mg Cl-35 208 MeV 11.4 MeV*cm2/mg Ni-58 265 MeV 26.6 MeV*cm2/mg Br-79 285 MeV 37.2 MeV*cm2/mg I-127 345 MeV 59.9 MeV*cm2/mg
Intermediate LET values were gained by varying the device to the beam angle of incidence.
Types of Errors
Output bits in error are kept count of as DATA errors (i.e., SEU in shift register). If
device output no longer appears or a shift in the output is recognized such as the same
bit being in error in multiple samples within a time frame (i.e., stage 2006 being stuck
at a given value), a device reconfiguration (i.e., SEU in configuration RAM portion of the
device) has occurred. This latter error is dubbed a Single Event Reconfiguration (SER). An
example would be if one of the SR stages experiences an SEU that changes the output state
used from Q to Qnot.
Test Results
Data errors
Data errors are shown in Figure 1. LETth is
~5 MeV*cm2/mg. Saturation cross section is ~8E-7cm2 per shift register.
SER
SERs were observed as noted in Figure 2.
LETth is again ~5 MeV*cm2/mg. Saturation cross section is ~7E-8cm2 per bit of
configuration RAM.
Anomalous condition observed:
Periodically throughout testing, we would observe Icc increases from the nominal 22 mA.
This increase would approximate a step-wise increase, i.e., at t1 Icc would go to 40 mA,
at time t2 Icc would go to 70 mA, etc... The device, however, would continue to operate
normally with no unusual errors in device output noted. While this stepwise increase was
occurring, if a SER occurred, the devices would be reloaded with the proper configuration
without removing device power. When this occurred, device Icc would return to nominal. On
several occasions, however, Icc continued its stepwise increase until current consumption
limit for SEL was trigerred. On analysis, though this event (>80 mA) was treated as SEL
during testing, it would probably be cleared by a reconfiguration and would not require a
power reset. Maximum currents observed were between 80 and 177 mA.
This condition is theorized to be either a form of snapback or a reconfiguration of an internal (blind to the user circuitry) node causing two output drivers to be in conflict.
DISCUSSION
No recommendation is being made at this time. In discussions with AK Research, this
anomalous condition observed is consistent with their observed results.
Proton SEU tests are planned for 12-96.
We apologize for any inconvenience previous versions of this test report may have caused.
Home
Last Revised: February 03, 2010
Digital Engineering Institute
Web Grunt: Richard Katz
