NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.

Office of Logic Design (OLD) Seminar Archive

Upcoming Seminars:

• "Engineering Aspects of the Lunar Orbiter Laser Altimeter (LOLA) Digital Unit Design" - (October 17, 2007)

• "Back to the Moon: The Verification of a Small Microprocessor's Logic Design" - (September 19, 2007)

• Briefing: RT54SX-S, RTSX-SU, RTAX-S, and Eclipse FPGAs for Spaceborne Application: (May 9: RTAX-S Boot Camp; May 10: Briefing; May 11: Eclipse Boot Camp).

• HDL Verification: Code Coverage (TBD, 2006)

• Neutron Effects in Mil/Aerospace Digital Electronics (TBD, 2006)

• Briefing: "A Simple and Powerful 1553 RT" (TBD, 2006)

• HDL Verification: Assertions (TBD, 2006)

• EEPROM and Non-Volatile Memory Workshop II (TBD 2006)

• RAD750 Workshop: (November, 2006)

Register for seminar notification e-mail list.

Past Seminars starting from September, 2004:

• Programmable Logic in the Radiation Environment - Part II (January 24, 2006)

• SX-S, SX-U, RTAX-S, and Eclipse FPGA Briefing (January 18, 2006)

• Programmable Logic in the Radiation Environment (December 14, 2005)

• Achronix Technology: High speed FPGAs for Extreme Environments (November 15, 2005)

• EEPROM Reliability -- (October 12, 2005).

• 2005 MAPLD International Conference Seminars (September 6, 2005)

  • Signal Integrity, Power Integrity, and Interfacing

  • Space Plug-and-play Avionics (SPA) Technical Committee/Workshop

  • Device Failure Modes and Reliability

  • Reconfigurable High-Performance Computing

• Seminar: "This Is What We Find In This Stuff" (July 25, 2005)

• Pyrotechnic Initiators, Applications, and Lessons Learned (June 7, 2005)

• Briefing: Independent NASA Test of FPGAs (May 11, 2005)

• Part I: Memory Design for Spaceborne Computers (April 28, 2005)

• Part IV: "Fundamentals of Digital Engineering: Digital Logic" (March 8, 2005)

• Briefing: Independent NASA Test of RTSX-SU FPGAs (February 16, 2005).

• Part III: "Fundamentals of Digital Engineering: Digital Logic" (January 11, 2005)

• "Fundamentals of Digital Engineering: Digital Logic" - Part II, December 9, 2004.

• Virtex II: SEU's and Mitigation through TMR (November 9, 2004)

• "Fundamentals of Digital Engineering: Digital Logic" (October 19, 2004)

• Actel RTSX-S, RTSX-SU, and SX-A Briefing, September 22, 2004

Home - NASA Office of Logic Design
Last Revised: February 03, 2010
Digital Engineering Institute
Web Grunt: Richard Katz